Datasheet Texas Instruments DS90UB914A-Q1
| Manufacturer | Texas Instruments |
| Series | DS90UB914A-Q1 |
25-100MHz 10/12-Bit FPD-Link III Deserializer
Datasheets
DS90UB914A-Q1 25-MHz to 100-MHz 10/12-Bit FPD-Link III Deserializer datasheet
PDF, 1.5 Mb, Revision: B, File published: Oct 29, 2016
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Prices
Status
| DS90UB914ATRHSJQ1 | DS90UB914ATRHSRQ1 | DS90UB914ATRHSTQ1 | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No |
Packaging
| DS90UB914ATRHSJQ1 | DS90UB914ATRHSRQ1 | DS90UB914ATRHSTQ1 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 48 | 48 | 48 |
| Package Type | RHS | RHS | RHS |
| Industry STD Term | WQFN | WQFN | WQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 2500 | 1000 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R |
| Device Marking | UB914AQ | UB914AQ | UB914AQ |
| Width (mm) | 7 | 7 | 7 |
| Length (mm) | 7 | 7 | 7 |
| Thickness (mm) | .75 | .75 | .75 |
| Pitch (mm) | .5 | .5 | .5 |
| Max Height (mm) | .8 | .8 | .8 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | DS90UB914ATRHSJQ1 | DS90UB914ATRHSRQ1 | DS90UB914ATRHSTQ1 |
|---|---|---|---|
| Color Depth, bpp | 12 | 12 | 12 |
| Diagnostics | BIST | BIST | BIST |
| EMI Reduction | SSCG,Staggered Outputs | SSCG,Staggered Outputs | SSCG,Staggered Outputs |
| Function | Deserializer | Deserializer | Deserializer |
| Input Compatibility | FPD-Link III LVDS | FPD-Link III LVDS | FPD-Link III LVDS |
| Operating Temperature Range, C | -40 to 105 | -40 to 105 | -40 to 105 |
| Output Compatibility | LVCMOS | LVCMOS | LVCMOS |
| Package Group | WQFN | WQFN | WQFN |
| Package Size: mm2:W x L, PKG | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) | 48WQFN: 49 mm2: 7 x 7(WQFN) |
| Pixel Clock Min, MHz | 25 | 25 | 25 |
| Pixel Clock(Max), MHz | 100 | 100 | 100 |
| Rating | Automotive | Automotive | Automotive |
| Signal Conditioning | Adaptive Equalizer | Adaptive Equalizer | Adaptive Equalizer |
| Special Features | FPD-Link III Coax | FPD-Link III Coax | FPD-Link III Coax |
| Total Throughput, Mbps | 1400 | 1400 | 1400 |
Eco Plan
| DS90UB914ATRHSJQ1 | DS90UB914ATRHSRQ1 | DS90UB914ATRHSTQ1 | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Cable Requirements for the DS90UB913A and DS90UB914APDF, 41 Kb, File published: Oct 14, 2014
The DS90UB913A and DS90UB914A chipset transports serialized video data over coaxial cables. A variety of cable assemblies meeting this generic description are available on the market, and not all perform equally. This document defines the cable characteristics required to properly support the high speed serial data transfer from a DS90UB913A serializer to a DS90UB914A deserializer. Three key pa - Ten tips for successfully designing with automotive EMC/EMI requirementsPDF, 380 Kb, File published: Jul 24, 2015
- I2C Communication over DS90UB913/4 FPD Link-III with BCCPDF, 4.9 Mb, File published: Apr 22, 2013
This application note describes I2C communication between DS90UB913/914 devices through the FPDLinkIII bidirectional control channel (referred as BCC). The low latency BCC interface allows the masterI2C device to remotely communicate with peripherals across the serial link. - Analog Applications Journal 3Q 2015PDF, 7.1 Mb, File published: Jul 24, 2015
Model Line
Series: DS90UB914A-Q1 (3)
Manufacturer's Classification
- Semiconductors> Interface> Display & Imaging SerDes> FPD-Link III SerDes
