Datasheet Texas Instruments DS90UR241IVSX/NOPB

Manufacturer	Texas Instruments
Series	DS90UR241
Part Number	DS90UR241IVSX/NOPB

5-43MHz DC-Balanced 24-Bit FPD-Link II Serializer 48-TQFP -40 to 105

Datasheets

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PDF, 1.4 Mb, Revision: O, File published: Apr 29, 2015

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Prices

Status

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Packaging

Pin	48	48
Package Type	PFB	PFB
Industry STD Term	TQFP	TQFP
JEDEC Code	S-PQFP-G	S-PQFP-G
Package QTY	1000	1000
Carrier	LARGE T&R	LARGE T&R
Device Marking	1IVS	DS90UR24
Width (mm)	7	7
Length (mm)	7	7
Thickness (mm)	1	1
Pitch (mm)	.5	.5
Max Height (mm)	1.2	1.2
Mechanical Data	Download	Download

Parametrics

Color Depth	18 bpp
Diagnostics	BIST
EMI Reduction	-
Function	Serializer
Input Compatibility	LVCMOS
Operating Temperature Range	-40 to 105 C
Output Compatibility	FPD-Link LVDS
Package Group	TQFP
Package Size: mm2:W x L	48TQFP: 81 mm2: 9 x 9(TQFP) PKG
Pixel Clock Min	5 MHz
Pixel Clock(Max)	43 MHz
Rating	Catalog
Signal Conditioning	Pre-Emphasis,VOD Select
Special Features	-
Total Throughput	1032 Mbps

Eco Plan

RoHS

Compliant

Design Kits & Evaluation Modules

Evaluation Modules & Boards: SERDESUR-43USB
Evaluation Kit for DS90UR241 DS90UR124 Serializer and Deserializer Chipset
Lifecycle Status: Active (Recommended for new designs)
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Application Notes

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AN-2068 DS90UR241/124 Spread Spectrum Tolerance Support (Rev. B)
PDF, 70 Kb, Revision: B, File published: Apr 26, 2013
Compliance to EMI limits is often a challenge. Spread spectrum clocking is commonly used to minimize EMI. The effect of modulating periodic signals, both clock and data, reduces the peak emissions by spreading the energy over a range of frequencies. The DS90UR241 and DS90UR124 chipset allows the use of spread spectrum clock and data inputs. The following is a discussion of spread spectrum clock ch
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AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
PDF, 45 Kb, Revision: B, File published: Apr 26, 2013
TIвЂ™s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
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LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
PDF, 101 Kb, Revision: A, File published: Apr 29, 2013
This application note introduces Texas InstrumentвЂ™s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
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Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
PDF, 118 Kb, Revision: A, File published: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
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DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
PDF, 170 Kb, Revision: E, File published: Apr 29, 2013
Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of todayвЂ™s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Model Line

Series: DS90UR241 (2)

DS90UR241IVS/NOPB DS90UR241IVSX/NOPB

Manufacturer's Classification

Semiconductors > Interface > FPD-Link SerDes > Display SerDes