Datasheet Texas Instruments DS90UR906QSQX/NOPB
| Manufacturer | Texas Instruments |
| Series | DS90UR906Q-Q1 |
| Part Number | DS90UR906QSQX/NOPB |
5-65MHz 24-bit Color FPD-Link II Deserializer 60-WQFN -40 to 105
Datasheets
DS90UR90xQ-Q1 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer datasheet
PDF, 1.6 Mb, Revision: H, File published: Jul 31, 2015
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 60 |
| Package Type | NKB |
| Industry STD Term | WQFN |
| JEDEC Code | S-PQSO-N |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | UR906QSQ |
| Width (mm) | 9 |
| Length (mm) | 9 |
| Thickness (mm) | .8 |
| Pitch (mm) | .5 |
| Max Height (mm) | .8 |
| Mechanical Data | Download |
Parametrics
| Color Depth | 24 bpp |
| Diagnostics | BIST,I2C Bus |
| EMI Reduction | SSCG,RDS,Progressive Turn On (PTO) |
| Function | Deserializer |
| Input Compatibility | FPD-Link II LVDS |
| Operating Temperature Range | -40 to 105 C |
| Output Compatibility | LVCMOS |
| Package Group | WQFN |
| Package Size: mm2:W x L | 60WQFN: 81 mm2: 9 x 9(WQFN) PKG |
| Pixel Clock Min | 5 MHz |
| Pixel Clock(Max) | 65 MHz |
| Rating | Automotive |
| Signal Conditioning | Equalizer |
| Special Features | 1.8V or 3.3V VDDIO,I2C Config |
| Total Throughput | 1560 Mbps |
Eco Plan
| RoHS | Compliant |
Application Notes
- AN-1807 FPD-Link II Display SerDes Overview (Rev. B)PDF, 45 Kb, Revision: B, File published: Apr 26, 2013
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s - LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revision: A, File published: Apr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)PDF, 118 Kb, Revision: A, File published: Apr 26, 2013
TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
Model Line
Series: DS90UR906Q-Q1 (3)
- DS90UR906QSQ/NOPB DS90UR906QSQE/NOPB DS90UR906QSQX/NOPB
Manufacturer's Classification
- Semiconductors > Interface > FPD-Link SerDes > Display SerDes
