Datasheet Texas Instruments DS90UR908Q-Q1

ManufacturerTexas Instruments
SeriesDS90UR908Q-Q1
Datasheet Texas Instruments DS90UR908Q-Q1

5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter

Datasheets

DS90UR908Q 5-65 MHz 24-bit Color FPD-Link II to FPD-Link Conv datasheet
PDF, 847 Kb, Revision: H, File published: Apr 16, 2013
Extract from the document

Prices

Status

DS90UR908QSQ/NOPBDS90UR908QSQE/NOPBDS90UR908QSQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNo

Packaging

DS90UR908QSQ/NOPBDS90UR908QSQE/NOPBDS90UR908QSQX/NOPB
N123
Pin484848
Package TypeRHSRHSRHS
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502500
CarrierLARGE T&RSMALL T&RLARGE T&R
Device Marking90UR908Q90UR908Q90UR908Q
Width (mm)777
Length (mm)777
Thickness (mm).75.75.75
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsDS90UR908QSQ/NOPB
DS90UR908QSQ/NOPB
DS90UR908QSQE/NOPB
DS90UR908QSQE/NOPB
DS90UR908QSQX/NOPB
DS90UR908QSQX/NOPB
Color Depth, bpp242424
DiagnosticsBIST,I2C BusBIST,I2C BusBIST,I2C Bus
EMI ReductionSSCG,LVDS OutputsSSCG,LVDS OutputsSSCG,LVDS Outputs
FunctionDeserializerDeserializerDeserializer
Input CompatibilityFPD-Link II LVDSFPD-Link II LVDSFPD-Link II LVDS
Operating Temperature Range, C-40 to 105-40 to 105-40 to 105
Output CompatibilityFPD-Link LVDSFPD-Link LVDSFPD-Link LVDS
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)
Pixel Clock Min, MHz555
Pixel Clock(Max), MHz656565
RatingAutomotiveAutomotiveAutomotive
Signal ConditioningEqualizerEqualizerEqualizer
Special Features1.8V or 3.3V VDDIO,I2C Config1.8V or 3.3V VDDIO,I2C Config1.8V or 3.3V VDDIO,I2C Config
Total Throughput, Mbps156015601560

Eco Plan

DS90UR908QSQ/NOPBDS90UR908QSQE/NOPBDS90UR908QSQX/NOPB
RoHSCompliantCompliantCompliant

Application Notes

  • AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
    PDF, 45 Kb, Revision: B, File published: Apr 26, 2013
    TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revision: A, File published: Apr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
    PDF, 118 Kb, Revision: A, File published: Apr 26, 2013
    TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Display & Imaging SerDes> FPD-Link II SerDes