Datasheet Texas Instruments DS92LX2122

ManufacturerTexas Instruments
SeriesDS92LX2122
Datasheet Texas Instruments DS92LX2122

10 - 50 MHz DC-Balanced Channel Link III Bi-Directional Control Deserializer

Datasheets

DS92LX2121/22 10 - 50 MHz DC-Balanced Ch Link III Bi-Directional Control SER/DES datasheet
PDF, 980 Kb, Revision: J, File published: Jan 17, 2014
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Prices

Status

DS92LX2122SQ/NOPBDS92LX2122SQE/NOPBDS92LX2122SQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesNo

Packaging

DS92LX2122SQ/NOPBDS92LX2122SQE/NOPBDS92LX2122SQX/NOPB
N123
Pin484848
Package TypeRHSRHSRHS
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002502500
CarrierLARGE T&RSMALL T&RLARGE T&R
Device MarkingLX2122LX2122LX2122
Width (mm)777
Length (mm)777
Thickness (mm).75.75.75
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsDS92LX2122SQ/NOPB
DS92LX2122SQ/NOPB
DS92LX2122SQE/NOPB
DS92LX2122SQE/NOPB
DS92LX2122SQX/NOPB
DS92LX2122SQX/NOPB
Clock Max, MHz505050
Clock Min, MHz101010
Compression Ratio21 to 121 to 121 to 1
ESD, kV888
FunctionDeserializerDeserializerDeserializer
Input CompatibilityCMLCMLCML
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output CompatibilityLVCMOSLVCMOSLVCMOS
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)48WQFN: 49 mm2: 7 x 7(WQFN)
Parallel Bus Width, bits212121
ProtocolsChannel-Link IIIChannel-Link IIIChannel-Link III
RatingCatalogCatalogCatalog

Eco Plan

DS92LX2122SQ/NOPBDS92LX2122SQE/NOPBDS92LX2122SQX/NOPB
RoHSCompliantCompliantCompliant

Application Notes

  • DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
    PDF, 170 Kb, Revision: E, File published: Apr 29, 2013
    Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Serializer, Deserializer> Channel Link III