Datasheet Texas Instruments LMK04610RTQR
| Manufacturer | Texas Instruments |
| Series | LMK04610 |
| Part Number | LMK04610RTQR |
Ultra Low-Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual PLLs 56-QFN -40 to 85
Datasheets
LMK04610 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs datasheet
PDF, 2.3 Mb, Revision: A, File published: Jun 22, 2017
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 56 |
| Package Type | RTQ |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | LMK04610 |
| Width (mm) | 8 |
| Length (mm) | 8 |
| Thickness (mm) | .9 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | Download |
Parametrics
| Number of Inputs | 2 |
| Number of Outputs | 10 |
| Operating Temperature Range | -40 to 85 C |
| Output Frequency(Max) | 2000 MHz |
| Output Frequency(Min) | 0.03 MHz |
| Output Level | HCSL,HSDS,LVDS,LVPECL |
| Package Group | QFN |
| Package Size: mm2:W x L | 56QFN: 64 mm2: 8 x 8(QFN) PKG |
| RMS Jitter | 0.065 |
| Rating | Catalog |
| Special Features | 105C PCB temp,Holdover mode,JESD204B SYSREF Generation,Manual/auto switch,SPI |
| Supply Voltage(Max) | 3.465 V |
| Supply Voltage(Min) | 1.7 V |
| VCO Frequency(Max) | 6200 MHz |
| VCO Frequency(Min) | 5800 MHz |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: LMK04610EVM
LMK04610 Ultra Low-Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual PLLs EVM
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- SDPLL for LMK046xx FamilyPDF, 4.2 Mb, File published: May 15, 2017
PLLsusedin the LMK046xxfamilyof devicesare basedon Semi-digitalPLL architecture.LMK04610andLMK04616deviceshavetwo fullyintegratedPLLs.The first PLL,calledPLL1here,usesan externalVCXOas its voltage-controlledoscillator.It is a verylow-bandwidthPLL and the loopbandwidthis <300Hz. Sucha low bandwidthhelpsthe jitter cleaningfor a dirt - LMK0461x Phase Noise Performance With DC-DC Converters (Rev. B)PDF, 2.6 Mb, Revision: B, File published: Jul 20, 2017
The LMK0461xdevicefamilyis the industry’s highestperformancewith lowestpowerjittercleanerfamilywith dualPLLscalledPLL1and PLL2.PLL1is a verylow bandwidthPLL that usesan externalVCXOasvoltagecontroloscillator.PLL2is a high bandwidthPLL with an integratedhigh performanceLC oscillator.LMK04610provides10 differentialoutputsand the L - Clocking for Medical Ultrasound SystemsPDF, 1.8 Mb, File published: Sep 20, 2017
Model Line
Series: LMK04610 (2)
- LMK04610RTQR LMK04610RTQT
Manufacturer's Classification
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Dual / Cascaded PLL
