Datasheet Texas Instruments OMAP3503

Manufacturer	Texas Instruments
Series	OMAP3503

Datasheets

Prices

Status

Packaging

Parametrics

Parameters / Models	OMAP3503DCBB	OMAP3503DCBBA	OMAP3503DCBC	OMAP3503DCBCA	OMAP3503DCUS	OMAP3503DCUS72	OMAP3503DCUSA	OMAP3503ECBB	OMAP3503ECBBA	OMAP3503ECBBALPD	OMAP3503ECBC	OMAP3503ECBCA	OMAP3503ECUS	OMAP3503ECUS72	OMAP3503ECUSA
ARM CPU	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8	1 ARM Cortex-A8
ARM MHz, Max.								720	720	720	720	720	720	720	720
ARM MHz (Max.)	720	720	720	720	720	720	720
Applications	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment Enterprise Systems Industrial Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics	Communications Equipment,Enterprise Systems,Industrial,Personal Electronics
Approx. Price (US$)	23.00 | 1ku	23.00 | 1ku	23.00 | 1ku	23.00 | 1ku	23.00 | 1ku	23.00 | 1ku	23.00 | 1ku
DRAM	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR	LPDDR
Display Options	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD rotation/resizing multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay	LCD,rotation/resizing,multidisplay
I2C	3	3	3	3	3	3	3	3	3	3	3	3	3	3	3
On-Chip L2 Cache	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)	256 KB (ARM Cortex-A8)
Operating Systems	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Neutrino Integrity Tornado Windows Embedded CE Linux VxWorks	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE	Integrity,Linux,Neutrino,Tornado,VxWorks,Windows Embedded CE
Operating Temperature Range, C								-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90	-40 to 105,0 to 90
Operating Temperature Range(C)	-40 to 105 0 to 90	-40 to 105 0 to 90	-40 to 105 0 to 90	-40 to 105 0 to 90	-40 to 105 0 to 90	-40 to 105 0 to 90	-40 to 105 0 to 90
Other On-Chip Memory	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB	64 KB
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
SPI	4	4	4	4	4	4	4	4	4	4	4	4	4	4	4
UART, SCI								3	3	3	3	3	3	3	3
UART(SCI)	3	3	3	3	3	3	3
USB	2	2	2	2	2	2	2	2	2	2	2	2	2	2	2
Video Port, Configurable								1 Input,1 Output	1 Input,1 Output	1 Input,1 Output	1 Input,1 Output	1 Input,1 Output	1 Input,1 Output	1 Input,1 Output	1 Input,1 Output
Video Port (Configurable)	1 Input 1 Output	1 Input 1 Output	1 Input 1 Output	1 Input 1 Output	1 Input 1 Output	1 Input 1 Output	1 Input 1 Output

Eco Plan

Application Notes

• Download
  Demystify DSI I/F
  PDF, 1.8 Mb, File published: Nov 30, 2012
• Download
  Powering OMAP3 With TPS6235x: Design-In Guide
  PDF, 296 Kb, File published: Dec 3, 2008
  The OMAP35xx Applications Processors have a diverse set of power management features which potentially enable lower cost power solutions based on your application. This design-in guide describes a power solution based on the TPS6235x device. This guide can be used to evaluate this solution for your design or help you make decisions when designing in this solution.
• Download
  OMAP3530/25/15/03 CBB CBC & CUS Reflow Profiles
  PDF, 27 Kb, File published: Nov 13, 2009
  This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:

  http://wiki.davincidsp.com/index.php/OMAP3_CBB_CBC_CUS_Reflow_Profiles

  Reflow profiles are dependent on numerous factors including package type number of components bo

• Download
  OMAP35x Linux PSP Data Sheet
  PDF, 1.6 Mb, File published: Oct 16, 2009
• Download
  OMAP35x 0.65mm Pitch Layout Methods (Rev. B)
  PDF, 372 Kb, Revision: B, File published: Jun 26, 2008
  It is easy to see from the unique look that the OMAP35x parts have a very unusual footprint. The OMAP35x ball grid array is designed with new technology called the Via Channel array which makes significant printed circuit board (PCB) cost savings possible. If the PCB is routed correctly this cost savings can be substantial. This application report explains how this is possible and shows several
• Download
  Powering OMAP3 With TPS65023: Design-In Guide (Rev. B)
  PDF, 181 Kb, Revision: B, File published: Mar 2, 2009
• Download
  OMAP35x to AM35x Hardware Migration Guide
  PDF, 19 Kb, File published: May 24, 2010
  This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:

  http://processors.wiki.ti.com/index.php/OMAP35x_to_AM35x_Hardware_Migration_Guide.

  This article describes hardware device considerations to migrate a design

• Download
  OMAP35x to AM37x Hardware Migration Guide
  PDF, 37 Kb, File published: Jun 3, 2010
  This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:

  http://processors.wiki.ti.com/index.php/OMAP35x_To_AM37x_Hardware_Migration_Guide.

  The OMAP35x to AM37x Hardware Migration Guide describes device consideratio

• Download
  PCB Assembly Guidelines for 0.4mm Package-On-Package (PoP) Packages Part II (Rev. A)
  PDF, 2.4 Mb, Revision: A, File published: Nov 1, 2013
  Once the bottom circuit board has been designed the assembly guidelines for package-on-package (PoP) versions of the OMAP35xx processor and the memory device must be considered.

  PoP packages have an enormous number of variables associated with assembly. The following factors have a major effect on the quality and reliability of final assembly: the circuit board design the solder paste char

• Download
  PCB Design Guidelines for 0.4mm Package-On-Package (PoP) Packages Part I (Rev. B)
  PDF, 6.7 Mb, Revision: B, File published: Jun 13, 2009
  Ball grid array (BGA) packages having 0.4mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies; the standard rules of thumb don't apply anymore. In fact the design guidelines for 0.4mm and 0.5mm differ primarily due to issues surrounding shorts or opens between balls under the processor.In addition to the de
• Download
  PCB Design Guidelines for 0.5mm Package-On-Package Apps Processors Part I
  PDF, 2.0 Mb, File published: Jun 23, 2010
  Ball grid array (BGA) packages having 0.5mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies. PCBs with package-on-package (PoP) technology have additional assembly requirements and options that need to be considered when designing the PCB.

  Fine-pitch PCB design is a team effort and may require more than

• Download
  PCB Assembly Guidelines for 0.5mm Package-on-Package Apps Processors Part II
  PDF, 1.2 Mb, File published: Jun 23, 2010
  Once the main printed circuit board (PCB) has been designed the assembly guidelines for the 0.5mm package-on-package (PoP) applications processor and companion memory device must be considered. PoP applications processors have an enormous number of variables associated with assembly. The following factors have a major effect on the quality and reliability of PCB assembly: PoP applications process

Model Line

Manufacturer's Classification

• Semiconductors> Processors> Sitara Processors> ARM Cortex-A8> AM3x