Datasheet Texas Instruments SM320C80

ManufacturerTexas Instruments
SeriesSM320C80
Datasheet Texas Instruments SM320C80

Digital Signal Processors

Datasheets

SMJ320C80 Digital Signal Processor datasheet
PDF, 3.4 Mb, Revision: B, File published: Jun 30, 2002
Extract from the document

Prices

Status

SM320C80GFM50SM320C80HFHM50
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Packaging

SM320C80GFM50SM320C80HFHM50
N12
Pin305320
Package TypeGFHFH
Industry STD TermCPGACFP
JEDEC CodeS-CPGA-PR-CQFP-F
Package QTY11
CarrierJEDEC TRAY (5+1)
Device MarkingSM320C80GFM50SM320C80HFHM50
Width (mm)47.257.63
Length (mm)47.257.63
Thickness (mm)3.34
Pitch (mm)1.27.5
Max Height (mm)5.594.55
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsSM320C80GFM50
SM320C80GFM50
SM320C80HFHM50
SM320C80HFHM50
Cycle Time, ns2020
DMA, Ch11
Data / Program Memory Space, Words2.4G2.4G
Frequency, MHz5050
MIPS6060
MOPS120120
Operating Temperature Range, C-55 to 125-55 to 125
Package GroupCPGACFP
Pin/Package305CPGA, 320CFP305CPGA, 320CFP
RatingMilitaryMilitary

Eco Plan

SM320C80GFM50SM320C80HFHM50
RoHSSee ti.comSee ti.com

Application Notes

  • Modified Goertzel Algorithm in DTMF Detection Using the TMS320C80 DSP
    PDF, 101 Kb, File published: Jun 1, 1996
    This document presents a modified Goertzel algorithm for DTMF tone detection on a TMS320C80 ('C80) 32-bit multiprocessor digital signal processor (DSP). The algorithm detects the incoming frequency with an offset range plus or minus 1.5%. For this application, a basic implementation is provided, but additional testing is required to make this detection algorithm complete. The appendix provides the
  • Acoustic Echo Cancellation Algorithms and Implementation on the TMS320C80
    PDF, 223 Kb, File published: May 1, 1996
    Acoustic echo cancellation on the TMS320C8x multiprocessor digital signal processor (DSP) offers high performance and flexibility to meet varying user needs. This document describes the implementation of an integrated N-tap digital acoustic echo canceller on the TMS320C8x parallel processor (PP). A brief discussion of a generic echo cancellation algorithm is provided. A 512-tap (64-ms span) echo
  • TMS320C8x System-Level Synopsis (Rev. B)
    PDF, 516 Kb, Revision: B, File published: Sep 1, 1995
    The TMS320C8x is Texas Instruments? first generation of single-chipmultiprocessor digital signal processor (DSP) devices. Asingle ?C8x contains up to five powerful, fully programmable pro-cessors:a master processor (MP) and up to four parallel proces-sors(PPs). The MP is a 32-bit RISC (reduced instruction setcomputer) processor with an integral, high-performanceIEEE-754 floating-point

Model Line

Series: SM320C80 (2)

Manufacturer's Classification

  • Semiconductors> Processors> Digital Signal Processors> Other High Reliability DSPs