Datasheet Texas Instruments SN54HC688

Manufacturer	Texas Instruments
Series	SN54HC688

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Parametrics

Parameters / Models	5962-86818012A	5962-8681801RA	SN54HC688J	SNJ54HC688FK	SNJ54HC688J
Bits	8	8	8	8	8
F @ Nom Voltage(Max), Mhz	70	70	70	70	70
ICC @ Nom Voltage(Max), mA	0.08	0.08	0.08	0.08	0.08
Input Type	CMOS	CMOS	CMOS	CMOS	CMOS
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	5.2/-5.2	5.2/-5.2	5.2/-5.2	5.2/-5.2	5.2/-5.2
Output Type	CMOS	CMOS	CMOS	CMOS	CMOS
Package Group	LCCC	CDIP	CDIP	LCCC	CDIP
Package Size: mm2:W x L, PKG	20LCCC: 79 mm2: 8.89 x 8.89(LCCC)	See datasheet (CDIP)	See datasheet (CDIP)	20LCCC: 79 mm2: 8.89 x 8.89(LCCC)	See datasheet (CDIP)
Rating	Military	Military	Military	Military	Military
Technology Family	HC	HC	HC	HC	HC
VCC(Max), V	6	6	6	6	6
VCC(Min), V	2	2	2	2	2
Voltage(Nom), V	6	6	6	6	6
tpd @ Nom Voltage(Max), ns	45	45	45	45	45

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Application Notes

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  PDF, 1.7 Mb, File published: Oct 1, 1996
  This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
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  PDF, 102 Kb, File published: May 1, 1996
  The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
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  PDF, 769 Kb, File published: Sep 7, 2001
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  TI IBIS File Creation Validation and Distribution Processes
  PDF, 380 Kb, File published: Aug 29, 2002
  The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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  Live Insertion
  PDF, 150 Kb, File published: Oct 1, 1996
  Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
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  Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
  PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
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  Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
  PDF, 337 Kb, File published: Jul 8, 2004
  Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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  Designing With Logic (Rev. C)
  PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
  Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
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  PDF, 93 Kb, File published: Apr 30, 2015
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  PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
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  CMOS Power Consumption and CPD Calculation (Rev. B)
  PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
  Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
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  Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
  PDF, 43 Kb, File published: Apr 1, 1996
  Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

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Manufacturer's Classification

• Semiconductors> Space & High Reliability> Logic Products> Specialty Logic Products> Digital Comparators