Datasheet Texas Instruments SN54LVC157A

Manufacturer	Texas Instruments
Series	SN54LVC157A

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Parametrics

Parameters / Models	5962-0050601QEA	5962-0050601QFA	SNJ54LVC157AJ	SNJ54LVC157AW
Approx. price, US$	31.413 | 100u	31.413 | 100u
Number of Channels			4	4
Configuration	2:1	2:1
Data rate(Max), Mbps	200	200
F @ Nom Voltage(Max), Mhz			100	100
Features	Balanced outputs,Very high speed (tpd 5-10ns),Over-voltage tolerant inputs	Balanced outputs,Very high speed (tpd 5-10ns),Over-voltage tolerant inputs
Function	Digital Multiplexer	Digital Multiplexer
ICC @ Nom Voltage(Max), mA			0.01	0.01
ICC(Max), uA	80	80
IOH(Max), mA	-24	-24
IOL(Max), mA	24	24
Input type	Standard CMOS	Standard CMOS
Number of channels	4	4
Operating Temperature Range, C			-55 to 125	-55 to 125
Operating temperature range, C	-55 to 125	-55 to 125
Output type	Push-Pull	Push-Pull
Package Group	CDIP|16,CFP|16	CDIP|16,CFP|16	CDIP	CFP
Package Size: mm2:W x L, PKG			See datasheet (CDIP)	See datasheet (CFP)
Rating	Military	Military	Military	Military
Schmitt Trigger			No	No
Supply voltage(Max), V	3.6	3.6
Supply voltage(Min), V	2	2
Technology Family	LVC	LVC	LVC	LVC
VCC(Max), V			3.6	3.6
VCC(Min), V			2	2
Voltage(Nom), V			2.7,3.3	2.7,3.3
tpd @ Nom Voltage(Max), ns			6.2,5.4	6.2,5.4

Eco Plan

Application Notes

• Download
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  PDF, 114 Kb, File published: Dec 1, 1996
  This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices.
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  PDF, 1.7 Mb, File published: Oct 1, 1996
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  PDF, 1.1 Mb, Revision: A, File published: Jul 26, 2016
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  PDF, 253 Kb, File published: May 1, 1996
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  PDF, 380 Kb, File published: Aug 29, 2002
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  PDF, 115 Kb, File published: Dec 1, 1997
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  PDF, 150 Kb, File published: Oct 1, 1996
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  PDF, 209 Kb, File published: May 10, 2002
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  PDF, 796 Kb, File published: Nov 6, 2003
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  Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
  PDF, 105 Kb, Revision: A, File published: Aug 1, 1997
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  Texas Instruments Little Logic Application Report
  PDF, 359 Kb, File published: Nov 1, 2002
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  PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
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  PDF, 337 Kb, File published: Jul 8, 2004
  Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Kb, Revision: B, File published: May 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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  PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
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  Introduction to Logic
  PDF, 93 Kb, File published: Apr 30, 2015
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  PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
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  PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
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Manufacturer's Classification

• Semiconductors> Space & High Reliability> Logic Products> Specialty Logic Products> Decoders/Encoders/Multiplexers