Datasheet Texas Instruments SN65LVDS32
| Manufacturer | Texas Instruments |
| Series | SN65LVDS32 |
Quad LVDS Receiver
Datasheets
SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet
PDF, 1.9 Mb, Revision: R, File published: Aug 6, 2014
Extract from the document
Prices
Status
| SN65LVDS32D | SN65LVDS32DG4 | SN65LVDS32DR | SN65LVDS32DRG4 | SN65LVDS32NSR | SN65LVDS32PW | SN65LVDS32PWG4 | SN65LVDS32PWR | SN65LVDS32PWRG4 | |
|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes | No | No | No | No | Yes | No | Yes |
Packaging
| SN65LVDS32D | SN65LVDS32DG4 | SN65LVDS32DR | SN65LVDS32DRG4 | SN65LVDS32NSR | SN65LVDS32PW | SN65LVDS32PWG4 | SN65LVDS32PWR | SN65LVDS32PWRG4 | |
|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |
| Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| Package Type | D | D | D | D | NS | PW | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | SOP | TSSOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 40 | 40 | 2500 | 2500 | 2000 | 90 | 2000 | 2000 | |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | TUBE | LARGE T&R | LARGE T&R | |
| Device Marking | LVDS32 | LVDS32 | LVDS32 | LVDS32 | LVDS32 | LVDS32 | LVDS32 | LVDS32 | |
| Width (mm) | 3.91 | 3.91 | 3.91 | 3.91 | 5.3 | 4.4 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 9.9 | 9.9 | 9.9 | 9.9 | 10.3 | 5 | 5 | 5 | 5 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.58 | 1.95 | 1 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 | 1.75 | 2 | 1.2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | SN65LVDS32D | SN65LVDS32DG4 | SN65LVDS32DR | SN65LVDS32DRG4 | SN65LVDS32NSR | SN65LVDS32PW | SN65LVDS32PWG4 | SN65LVDS32PWR | SN65LVDS32PWRG4 |
|---|---|---|---|---|---|---|---|---|---|
| Approx. Price (US$) | 1.35 | 1ku | ||||||||
| Device Type | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | |
| ESD HBM, kV | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | |
| ESD HBM(kV) | 8 | ||||||||
| Function | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver | Receiver |
| ICC(Max), mA | 18 | 18 | 18 | 18 | 18 | 18 | 18 | 18 | |
| ICC(Max)(mA) | 18 | ||||||||
| Input Signal | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS |
| No. of Rx | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | |
| Operating Temperature Range(C) | -40 to 85 | ||||||||
| Output Signal | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL | LVTTL |
| Package Group | SOIC | SOIC | SOIC | SOIC | SO | TSSOP | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SO: 80 mm2: 7.8 x 10.2(SO) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | |
| Package Size: mm2:W x L (PKG) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | ||||||||
| Protocols | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | LVDS | |
| Rating | Catalog | ||||||||
| Signaling Rate, Mbps | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | |
| Signaling Rate(Mbps) | 100 |
Eco Plan
| SN65LVDS32D | SN65LVDS32DG4 | SN65LVDS32DR | SN65LVDS32DRG4 | SN65LVDS32NSR | SN65LVDS32PW | SN65LVDS32PWG4 | SN65LVDS32PWR | SN65LVDS32PWRG4 | |
|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Not Compliant | Compliant | Compliant |
| Pb Free | No |
Application Notes
- Performance of LVDS with Different Cables (Rev. B)PDF, 246 Kb, Revision: B, File published: Feb 11, 2002
This application report focuses on cable for use with LVDS devices rather than printed-circuit board interconnections. After a brief introduction to LVDS, the signal quality of seven different cables is evaluated using eye pattern measurements and TI's LVDS evaluation modules (EVMs). Since data transmission cable covers a wide range of cost and performance, this paper provides guidance for cable s - LVDS Multidrop Connections (Rev. A)PDF, 809 Kb, Revision: A, File published: Feb 11, 2002
This application report describes design considerations for low-voltage differential swing (LVDS) multidrop connections. The report describes the maximum number of receivers possible versus signaling rate, signal quality, line length, output jitter, and common-mode voltage range when multidrop testing on a single LVDS line driver transmitting to numerous daisy-chained LVDS receivers.The LVDS rec
Model Line
Series: SN65LVDS32 (9)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)
