Datasheet Texas Instruments SN65LVDS32B
| Manufacturer | Texas Instruments |
| Series | SN65LVDS32B |
Quad LVDS Receiver with -2 to 4.4V Common-mode Range
Datasheets
High-Speed Differential Receivers datasheet
PDF, 747 Kb, Revision: B, File published: Apr 23, 2007
Extract from the document
Prices
Status
| SN65LVDS32BD | SN65LVDS32BDG4 | SN65LVDS32BDR | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | Yes |
Packaging
| SN65LVDS32BD | SN65LVDS32BDG4 | SN65LVDS32BDR | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 16 | 16 | 16 |
| Package Type | D | D | D |
| Industry STD Term | SOIC | SOIC | SOIC |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 40 | 40 | 2500 |
| Carrier | TUBE | TUBE | LARGE T&R |
| Device Marking | LVDS32B | LVDS32B | LVDS32B |
| Width (mm) | 3.91 | 3.91 | 3.91 |
| Length (mm) | 9.9 | 9.9 | 9.9 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | SN65LVDS32BD | SN65LVDS32BDG4 | SN65LVDS32BDR |
|---|---|---|---|
| Device Type | Receiver | Receiver | Receiver |
| ESD HBM, kV | 15 | 15 | 15 |
| Function | Receiver | Receiver | Receiver |
| ICC(Max), mA | 23 | 23 | 23 |
| Input Signal | LVDS | LVDS | LVDS |
| No. of Rx | 4 | 4 | 4 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Signal | LVTTL | LVTTL | LVTTL |
| Package Group | SOIC | SOIC | SOIC |
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) |
| Protocols | LVDS | LVDS | LVDS |
| Signaling Rate, Mbps | 400 | 400 | 400 |
Eco Plan
| SN65LVDS32BD | SN65LVDS32BDG4 | SN65LVDS32BDR | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Active Fail-Safe in TI's LVDS Receivers (Rev. B)PDF, 146 Kb, Revision: B, File published: Oct 31, 2001
Differential line receivers commonly have fail-safe circuits to prevent the receiver from switching on input noise. Many innovative LVDS fail-safe solutions require either external components, with subsequent reduction in signal quality, or integrated solutions with limitedapplication. This paper addresses an innovative integrated fail-safe incorporated into the SN65LVDS32B receiver (hereafter r
Model Line
Series: SN65LVDS32B (3)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)
