Datasheet Texas Instruments SN65LVDS33

ManufacturerTexas Instruments
SeriesSN65LVDS33
Datasheet Texas Instruments SN65LVDS33

Quad LVDS Receiver with -4 to 5V Common-mode Range

Datasheets

High Speed Differential Receivers datasheet
PDF, 982 Kb, Revision: B, File published: Nov 4, 2004
Extract from the document

Prices

Status

SN65LVDS33DSN65LVDS33DG4SN65LVDS33DRSN65LVDS33DRG4SN65LVDS33PWSN65LVDS33PWG4SN65LVDS33PWRSN65LVDS33PWRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoNoYesNoNoYesYes

Packaging

SN65LVDS33DSN65LVDS33DG4SN65LVDS33DRSN65LVDS33DRG4SN65LVDS33PWSN65LVDS33PWG4SN65LVDS33PWRSN65LVDS33PWRG4
N12345678
Pin1616161616161616
Package TypeDDDDPWPWPWPW
Industry STD TermSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY404025002500909020002000
CarrierTUBETUBELARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingLVDS33LVDS33LVDS33LVDS33LVDS33LVDS33LVDS33LVDS33
Width (mm)3.913.913.913.914.44.44.44.4
Length (mm)9.99.99.99.95555
Thickness (mm)1.581.581.581.581111
Pitch (mm)1.271.271.271.27.65.65.65.65
Max Height (mm)1.751.751.751.751.21.21.21.2
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN65LVDS33D
SN65LVDS33D
SN65LVDS33DG4
SN65LVDS33DG4
SN65LVDS33DR
SN65LVDS33DR
SN65LVDS33DRG4
SN65LVDS33DRG4
SN65LVDS33PW
SN65LVDS33PW
SN65LVDS33PWG4
SN65LVDS33PWG4
SN65LVDS33PWR
SN65LVDS33PWR
SN65LVDS33PWRG4
SN65LVDS33PWRG4
Device TypeReceiverReceiverReceiverReceiverReceiverReceiverReceiverReceiver
ESD HBM, kV1515151515151515
FunctionReceiverReceiverReceiverReceiverReceiverReceiverReceiverReceiver
ICC(Max), mA2323232323232323
Input SignalCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECLCMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL
No. of Rx44444444
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output SignalLVTTLLVTTLLVTTLLVTTLLVTTLLVTTLLVTTLLVTTL
Package GroupSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
ProtocolsLVDSLVDSLVDSLVDSLVDSLVDSLVDSLVDS
Signaling Rate, Mbps400400400400400400400400

Eco Plan

SN65LVDS33DSN65LVDS33DG4SN65LVDS33DRSN65LVDS33DRG4SN65LVDS33PWSN65LVDS33PWG4SN65LVDS33PWRSN65LVDS33PWRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)