Datasheet Texas Instruments SN65LVDS352
| Manufacturer | Texas Instruments |
| Series | SN65LVDS352 |
Quad LVDS Receiver with -4 to 5V Common-mode Range
Datasheets
Quad High-Speed Differential Receivers datasheet
PDF, 1.1 Mb, Revision: E, File published: May 5, 2004
Extract from the document
Prices
Status
| SN65LVDS352PW | SN65LVDS352PWG4 | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No |
Packaging
| SN65LVDS352PW | SN65LVDS352PWG4 | |
|---|---|---|
| N | 1 | 2 |
| Pin | 24 | 24 |
| Package Type | PW | PW |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 60 | 60 |
| Carrier | TUBE | TUBE |
| Device Marking | DL352 | DL352 |
| Width (mm) | 4.4 | 4.4 |
| Length (mm) | 7.8 | 7.8 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .65 | .65 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | SN65LVDS352PW | SN65LVDS352PWG4 |
|---|---|---|
| Device Type | Receiver | Receiver |
| Function | Receiver | Receiver |
| ICC(Max), mA | 20 | 20 |
| Input Signal | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL | CMOS,ECL,LVCMOS,LVDS,LVECL,LVPECL,PECL |
| No. of Rx | 4 | 4 |
| No. of Tx | 4 | 4 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 |
| Output Signal | LVTTL | LVTTL |
| Package Group | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) |
| Protocols | LVDS | LVDS |
| Signaling Rate, Mbps | 560 | 560 |
Eco Plan
| SN65LVDS352PW | SN65LVDS352PWG4 | |
|---|---|---|
| RoHS | Compliant | Compliant |
Model Line
Series: SN65LVDS352 (2)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> PECL PHY
