Datasheet Texas Instruments SN65LVDS386DGG

ManufacturerTexas Instruments
SeriesSN65LVDS386
Part NumberSN65LVDS386DGG
Datasheet Texas Instruments SN65LVDS386DGG

16-Channel LVDS Receiver 64-TSSOP -40 to 85

Datasheets

High-Speed Differential Line Receivers. datasheet
PDF, 1.7 Mb, Revision: I, File published: Jul 29, 2014
Extract from the document

Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin64
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY25
CarrierTUBE
Device MarkingLVDS386
Width (mm)6.1
Length (mm)17
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDownload

Parametrics

Device TypeReceiver
ESD HBM15 kV
FunctionReceiver
ICC(Max)70 mA
Input SignalLVDS
No. of Rx16
Operating Temperature Range-40 to 85 C
Output SignalLVTTL
Package GroupTSSOP
Package Size: mm2:W x L64TSSOP: 138 mm2: 8.1 x 17(TSSOP) PKG
ProtocolsLVDS
Signaling Rate250 Mbps

Eco Plan

RoHSCompliant

Design Kits & Evaluation Modules

  • Evaluation Modules & Boards: SN65LVDS386EVM
    16-channel LVDS Receiver Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

Application Notes

  • Using Signaling Rate and Transfer Rate (Rev. A)
    PDF, 258 Kb, Revision: A, File published: Feb 7, 2005
    This document defines data signaling rate and data transfer rate, and it demonstrates the differences between them. Taking the SN65LVDS386 and SN65LVDS387 16-channellow-voltage differential (LVDS) line drivers and receivers with random parallel data of various bandwidths as an example, this document discusses the components that make up the system timing budget and presents empirical data on cro

Model Line

Manufacturer's Classification

  • Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points