Datasheet Texas Instruments SN74ABT534A
| Manufacturer | Texas Instruments |
| Series | SN74ABT534A |
Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs
Datasheets
Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet
PDF, 1.2 Mb, Revision: F, File published: Jan 1, 1997
Extract from the document
Prices
Status
| SN74ABT534ADBLE | SN74ABT534ADBR | SN74ABT534ADW | SN74ABT534ADWR | SN74ABT534AN | SN74ABT534ANE4 | SN74ABT534APWLE | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
| SN74ABT534ADBLE | SN74ABT534ADBR | SN74ABT534ADW | SN74ABT534ADWR | SN74ABT534AN | SN74ABT534ANE4 | SN74ABT534APWLE | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DB | DB | DW | DW | N | N | PW |
| Industry STD Term | SSOP | SSOP | SOIC | SOIC | PDIP | PDIP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDSO-G |
| Width (mm) | 5.3 | 5.3 | 7.5 | 7.5 | 6.35 | 6.35 | 4.4 |
| Length (mm) | 7.2 | 7.2 | 12.8 | 12.8 | 24.33 | 24.33 | 6.5 |
| Thickness (mm) | 1.95 | 1.95 | 2.35 | 2.35 | 4.57 | 4.57 | 1 |
| Pitch (mm) | .65 | .65 | 1.27 | 1.27 | 2.54 | 2.54 | .65 |
| Max Height (mm) | 2 | 2 | 2.65 | 2.65 | 5.08 | 5.08 | 1.2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
| Package QTY | 2000 | 25 | 2000 | 20 | 20 | ||
| Carrier | LARGE T&R | TUBE | LARGE T&R | TUBE | TUBE | ||
| Device Marking | AB534A | ABT534A | ABT534A | SN74ABT534AN | SN74ABT534AN |
Parametrics
| Parameters / Models | SN74ABT534ADBLE | SN74ABT534ADBR | SN74ABT534ADW | SN74ABT534ADWR | SN74ABT534AN | SN74ABT534ANE4 | SN74ABT534APWLE |
|---|---|---|---|---|---|---|---|
| 3-State Output | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Approx. Price (US$) | 0.29 | 1ku | 0.29 | 1ku | |||||
| Bits | 8 | 8 | 8 | 8 | 8 | ||
| Bits(#) | 8 | 8 | |||||
| F @ Nom Voltage(Max), Mhz | 150 | 150 | 150 | 150 | 150 | ||
| F @ Nom Voltage(Max)(Mhz) | 150 | 150 | |||||
| ICC @ Nom Voltage(Max), mA | 30 | 30 | 30 | 30 | 30 | ||
| ICC @ Nom Voltage(Max)(mA) | 30 | 30 | |||||
| Input Type | TTL | TTL | |||||
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | ||
| Operating Temperature Range(C) | -40 to 85 | -40 to 85 | |||||
| Output Drive (IOL/IOH)(Max), mA | 64/-32 | 64/-32 | 64/-32 | 64/-32 | 64/-32 | ||
| Output Drive (IOL/IOH)(Max)(mA) | 64/-32 | 64/-32 | |||||
| Output Type | TTL | TTL | |||||
| Package Group | SSOP | SSOP | SOIC | SOIC | PDIP | PDIP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | See datasheet (PDIP) | See datasheet (PDIP) | ||
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) | See datasheet (PDIP) | |||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No |
| Technology Family | ABT | ABT | ABT | ABT | ABT | ABT | ABT |
| VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | ||
| VCC(Max)(V) | 5.5 | 5.5 | |||||
| VCC(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | ||
| VCC(Min)(V) | 4.5 | 4.5 | |||||
| Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | ||
| Voltage(Nom)(V) | 5 | 5 | |||||
| tpd @ Nom Voltage(Max), ns | 7.9 | 7.9 | 7.9 | 7.9 | 7.9 | ||
| tpd @ Nom Voltage(Max)(ns) | 7.9 | 7.9 |
Eco Plan
| SN74ABT534ADBLE | SN74ABT534ADBR | SN74ABT534ADW | SN74ABT534ADWR | SN74ABT534AN | SN74ABT534ANE4 | SN74ABT534APWLE | |
|---|---|---|---|---|---|---|---|
| RoHS | Not Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Not Compliant |
| Pb Free | Yes | No | No | Yes |
Application Notes
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Texas Instruments (TI) Quad Flatpack No-lead (QFN) 14/16/20-terminal Pb-free plastic packages meet dimensions specified in JEDEC standard MO-241 allow for board miniaturization and hold several advantages over traditional SOIC SSOP TSSOP and TVSOP packages. The packages are physically smaller have a smaller routing area improved thermal performance and improved electrical parasitics while - Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)PDF, 528 Kb, Revision: B, File published: Jun 1, 1997
The purpose of this document is to assist the designers of high-performance digital logic systems in using the advanced BiCMOS technology (ABT) logic family. Detailed electrical characteristics of these bus-interface devices are provided and tables and graphs have been included to compare specific parameters of the ABT family with those of other logic families. In addition typical data is provide - Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)PDF, 115 Kb, Revision: A, File published: Mar 1, 1997
Advanced bus-interface logic (ABIL) products processed in submicron advanced BiCMOS technologies (ABT) address the specific end-equipment demands of workstations personal and portable computers and telecommunications markets. This document discusses ABIL as system bus interfaces the merits of ABT its I/O structure packaging and ABT products for end-equipment specific solutions. - Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)PDF, 80 Kb, Revision: A, File published: Dec 1, 1996
This document shows the output skew for the ABT16254 ABT16952 and ABT16500A devices of the TI advanced BiCMOS (ABT) family. The data samples show which output skew is being examined where the data originates and how it is analyzed. Some errors present in the data are discussed. Skew curves at varying temperatures are given for the ABT16240 ABT16245 ABT16952 ABT16500A and ABT16249 devic - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Kb, File published: May 1, 1996
- Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, File published: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Model Line
Series: SN74ABT534A (7)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop
