Datasheet Texas Instruments SN74ACT7807
| Manufacturer | Texas Instruments |
| Series | SN74ACT7807 |
2048 x 9 synchronous FIFO memory
Datasheets
2048 X 9 Clocked First-In, First-Out Memory (Rev. D)
PDF, 250 Kb, Revision: D, File published: Apr 1, 1998
Prices
Status
| SN74ACT7807-20FN | |
|---|---|
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| SN74ACT7807-20FN | |
|---|---|
| N | 1 |
| Pin | 44 |
| Package Type | FN |
| Industry STD Term | PLCC |
| JEDEC Code | S-PQCC-J |
| Package QTY | 26 |
| Carrier | TUBE |
| Device Marking | ACT7807-20FN |
| Width (mm) | 16.59 |
| Length (mm) | 16.59 |
| Thickness (mm) | 4.06 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 4.57 |
| Mechanical Data | Download |
Eco Plan
| SN74ACT7807-20FN | |
|---|---|
| RoHS | Compliant |
| Pb Free | Yes |
Application Notes
- FIFO Memories: Solutions For Increasing Clock Rates And Data Widths (Rev. A)PDF, 95 Kb, Revision: A, File published: Mar 1, 1996
Four TI CMOS clocked first-in first-out (FIFO) memories the 2k?9 SN74ACT807, the 512?18 SN74ACT7803, the 256?18 SN74ACT7805, and the 64?18 SN748ACT7813 provide synchronous interfaces that conform to the requirements of many high-performance systems. The FIFO architecture limits the glue logic necessary and limits the timing constraints to the system. Each FIFO is easily expanded to accommodate var - Metastability Performance Of Clocked FIFOs (Rev. A)PDF, 64 Kb, Revision: A, File published: Mar 1, 1996
This document helps the user understand the metastable performance of TLI clocked FIFOs in asynchronous-system applications. A basic discussion of metastable-operation theory, the equations to calculate metastable failure rates for 1- and 2-stage synchronization, and an approach used for synchronizing the state flags on a series of TI clocked FIFOs is provided. A test setup to measure the failure - Power-Dissipation Calculations for TI FIFO Products (Rev. A)PDF, 106 Kb, Revision: A, File published: Mar 1, 1996
Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36 - Simultaneous-Switching Noise Analysis For Texas Instruments FIFO Products (Rev. A)PDF, 147 Kb, Revision: A, File published: Mar 1, 1996
In the high-speed advanced logic families, including ACT and ABT FIFO products, analysis of circuit noise immunity during simultaneous switching of multiple outputs is crucial. This document provides a thorough explanation of noise reduction techniques for TI FIFO devices. It is designed to assist component and system design engineers in the evaluation of simultaneous switching noise for ACT and A
Model Line
Series: SN74ACT7807 (1)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> FIFO Register
