Datasheet Texas Instruments SN74ACT8990FN
Manufacturer | Texas Instruments |
Series | SN74ACT8990 |
Part Number | SN74ACT8990FN |
Test-Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters With 16-Bit Generic Host Interfaces 44-PLCC -40 to 85
Datasheets
Test Bus Controllers, JTAG TAP Masters With 16-Bit Generic Host Interfaces datasheet
PDF, 923 Kb, Revision: E, File published: Jan 1, 1997
Extract from the document
Prices
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 44 |
Package Type | FN |
Industry STD Term | PLCC |
JEDEC Code | S-PQCC-J |
Package QTY | 26 |
Carrier | TUBE |
Device Marking | ACT8990 |
Width (mm) | 16.59 |
Length (mm) | 16.59 |
Thickness (mm) | 4.06 |
Pitch (mm) | 1.27 |
Max Height (mm) | 4.57 |
Mechanical Data | Download |
Eco Plan
RoHS | Compliant |
Application Notes
- Test-Bus ControllerPDF, 1.5 Mb, File published: Aug 31, 2000
This application report describes IEEE Std 1149.1 test-bus controller (TBC) SN74ACT8990 from Texas Instruments (TI). The first part explains the architecture and operation of the TBC; the second part uses examples to explain the programming procedure.TI is a trademark of Texas Instruments. - Programming CPLDs Via the 'LVT8986 LASPPDF, 819 Kb, File published: Nov 1, 2005
This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to
Model Line
Series: SN74ACT8990 (2)
- SN74ACT8990FN SN74ACT8990FNR
Manufacturer's Classification
- Semiconductors > Logic > Specialty Logic > Boundary Scan (JTAG) Logic