Datasheet Texas Instruments SN74ALVTH16373

Manufacturer	Texas Instruments
Series	SN74ALVTH16373

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Parametrics

Parameters / Models	74ALVTH16373GRE4	74ALVTH16373GRG4	74ALVTH16373VRE4	74ALVTH16373VRG4	SN74ALVTH16373DL	SN74ALVTH16373DLR	SN74ALVTH16373GR	SN74ALVTH16373VR
3-State Output	Yes	Yes	Yes	Yes	Yes	Yes	Yes	Yes
Bits	16	16	16	16	16	16	16	16
F @ Nom Voltage(Max), Mhz	250	250	250	250	250	250	250	250
ICC @ Nom Voltage(Max), mA	5	5	5	5	5	5	5	5
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32	64/-32
Package Group	TSSOP	TSSOP	TVSOP	TVSOP	SSOP	SSOP	TSSOP	TVSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No	No
Technology Family	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT	ALVT
VCC(Max), V	3.6	3.6	3.6	3.6	3.6	3.6	3.6	3.6
VCC(Min), V	2.3	2.3	2.3	2.3	2.3	2.3	2.3	2.3
Voltage(Nom), V	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3	2.5,3.3
tpd @ Nom Voltage(Max), ns	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3	3.8,3.3

Eco Plan

Application Notes

• Download
  Advanced Low-Voltage Technology
  PDF, 59 Kb, File published: Jul 27, 1999
  ALVT, the advanced low-voltage logic family, offers high-performance BiCMOS devices that are functional at 3.3-V and 2.5-V V sub CC and have low propagation delay, low static-power consumption, and 64 mA current drive. Other features include 5-V tolerance; auto3-state; bus hold; partial power down, hot insertion, and live insertion; and excellent simultaneous-switching and output-skew performance.
• Download
  Bus-Hold Circuit
  PDF, 418 Kb, File published: Feb 5, 2001
  When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
• Download
  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Kb, Revision: B, File published: May 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
• Download
  Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
  PDF, 209 Kb, File published: May 10, 2002
  Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
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  Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
  PDF, 154 Kb, Revision: A, File published: Sep 8, 1999
  In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
• Download
  Power-Up Behavior of Clocked Devices (Rev. A)
  PDF, 34 Kb, Revision: A, File published: Feb 6, 2015

Model Line

Manufacturer's Classification

• Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch