Datasheet Texas Instruments SN74AUC1G80
Manufacturer | Texas Instruments |
Series | SN74AUC1G80 |
Single Positive-Edge-Triggered D-Type Flip-Flop
Datasheets
SN74AUC1G80 datasheet
PDF, 950 Kb, Revision: K, File published: Jan 11, 2007
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Status
SN74AUC1G80DBVR | SN74AUC1G80DCKR | SN74AUC1G80DCKRG4 | SN74AUC1G80YZPR | |
---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes | Yes | Yes | Yes |
Packaging
SN74AUC1G80DBVR | SN74AUC1G80DCKR | SN74AUC1G80DCKRG4 | SN74AUC1G80YZPR | |
---|---|---|---|---|
N | 1 | 2 | 3 | 4 |
Pin | 5 | 5 | 5 | 5 |
Package Type | DBV | DCK | DCK | YZP |
Industry STD Term | SOT-23 | SOT-SC70 | SOT-SC70 | DSBGA |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-XBGA-N |
Package QTY | 3000 | 3000 | 3000 | 3000 |
Carrier | LARGE T&R | LARGE T&R | LARGE T&R | LARGE T&R |
Device Marking | U80R | UXR | UXR | UXN |
Width (mm) | 1.6 | 1.25 | 1.25 | 1.25 |
Length (mm) | 2.9 | 2 | 2 | 1.75 |
Thickness (mm) | 1.2 | .9 | .9 | .31 |
Pitch (mm) | .95 | .65 | .65 | .5 |
Max Height (mm) | 1.45 | 1.1 | 1.1 | .5 |
Mechanical Data | Download | Download | Download | Download |
Parametrics
Parameters / Models | SN74AUC1G80DBVR | SN74AUC1G80DCKR | SN74AUC1G80DCKRG4 | SN74AUC1G80YZPR |
---|---|---|---|---|
3-State Output | No | No | No | No |
Bits | 1 | 1 | 1 | 1 |
F @ Nom Voltage(Max), Mhz | 250 | 250 | 250 | 250 |
Gate Type | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP |
ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 | 0.01 |
Logic | True | True | True | True |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Output Drive (IOL/IOH)(Max), mA | 9/-9 | 9/-9 | 9/-9 | 9/-9 |
Package Group | SOT-23 | SC70 | SC70 | DSBGA |
Package Size: mm2:W x L, PKG | 5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) | 5SC70: 4 mm2: 2.1 x 2(SC70) | 5SC70: 4 mm2: 2.1 x 2(SC70) | See datasheet (DSBGA) |
Rating | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No |
Special Features | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd |
Sub-Family | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop |
Technology Family | AUC | AUC | AUC | AUC |
VCC(Max), V | 2.7 | 2.7 | 2.7 | 2.7 |
VCC(Min), V | 0.8 | 0.8 | 0.8 | 0.8 |
Voltage(Nom), V | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 |
tpd @ Nom Voltage(Max), ns | 5,3.9,2.5,1.9,1.3 | 5,3.9,2.5,1.9,1.3 | 5,3.9,2.5,1.9,1.3 | 5,3.9,2.5,1.9,1.3 |
Eco Plan
SN74AUC1G80DBVR | SN74AUC1G80DCKR | SN74AUC1G80DCKRG4 | SN74AUC1G80YZPR | |
---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant |
Application Notes
- Application of the Texas Instruments AUC Sub-1-V Little Logic Devices (Rev. A)PDF, 449 Kb, Revision: A, File published: Sep 19, 2002
Power consumption and speed are always concerns in electronic system logic design. Texas Instruments (TI) announces the industry?s first sub-1-V logic family that provides significant benefits to portable consumer electronics by operating at low power and high speed, while maintaining overall system signal integrity. TI?s next-generation logic family is the advanced ultra-low-voltage CMOS (AUC) fa - Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus DevicesPDF, 374 Kb, File published: Mar 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V
Model Line
Series: SN74AUC1G80 (4)
Manufacturer's Classification
- Semiconductors> Logic> Little Logic