Datasheet Texas Instruments SN74AUC2G04
| Manufacturer | Texas Instruments |
| Series | SN74AUC2G04 |
Dual Inverter Gate
Datasheets
SN74AUC2G04 datasheet
PDF, 969 Kb, Revision: A, File published: Jun 4, 2003
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Status
| SN74AUC2G04DBVR | SN74AUC2G04DCKR | SN74AUC2G04YZPR | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | Yes |
Packaging
| SN74AUC2G04DBVR | SN74AUC2G04DCKR | SN74AUC2G04YZPR | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 6 | 6 | 6 |
| Package Type | DBV | DCK | YZP |
| Industry STD Term | SOT-23 | SOT-SC70 | DSBGA |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-XBGA-N |
| Package QTY | 3000 | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | U04R | UCR | UCN |
| Width (mm) | 1.6 | 1.25 | .9 |
| Length (mm) | 2.9 | 2 | 1.5 |
| Thickness (mm) | 1.2 | .9 | 2 |
| Pitch (mm) | .95 | .65 | .5 |
| Max Height (mm) | 1.45 | 1.1 | .5 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | SN74AUC2G04DBVR | SN74AUC2G04DCKR | SN74AUC2G04YZPR |
|---|---|---|---|
| 3-State Output | No | No | No |
| Bits | 2 | 2 | 2 |
| F @ Nom Voltage(Max), Mhz | 250 | 250 | 250 |
| Gate Type | INVERTER BUFFER | INVERTER BUFFER | INVERTER BUFFER |
| ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 |
| Logic | Inverting | Inverting | Inverting |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | 9/-9 | 9/-9 | 9/-9 |
| Package Group | SOT-23 | SC70 | DSBGA |
| Package Size: mm2:W x L, PKG | 6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) | 6SC70: 4 mm2: 2.1 x 2(SC70) | See datasheet (DSBGA) |
| Rating | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No |
| Special Features | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd | IOFF,low power consumption,low tpd |
| Sub-Family | Inverting Buffer/Driver | Inverting Buffer/Driver | Inverting Buffer/Driver |
| Technology Family | AUC | AUC | AUC |
| VCC(Max), V | 2.7 | 2.7 | 2.7 |
| VCC(Min), V | 0.8 | 0.8 | 0.8 |
| Voltage(Nom), V | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 | 0.8,1.2,1.5,1.8,2.5 |
| tpd @ Nom Voltage(Max), ns | 5.4,3.1,2,1.7,1.2 | 5.4,3.1,2,1.7,1.2 | 5.4,3.1,2,1.7,1.2 |
Eco Plan
| SN74AUC2G04DBVR | SN74AUC2G04DCKR | SN74AUC2G04YZPR | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus DevicesPDF, 374 Kb, File published: Mar 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V
Model Line
Series: SN74AUC2G04 (3)
Manufacturer's Classification
- Semiconductors> Logic> Little Logic
