Datasheet Texas Instruments SN74FB1653

ManufacturerTexas Instruments
SeriesSN74FB1653
Datasheet Texas Instruments SN74FB1653

17-Bit LVTTL/BTL Universal Storage Transceivers With Buffered Clock Lines

Datasheets

SN74FB1653 datasheet
PDF, 262 Kb, Revision: H, File published: Mar 10, 2004
Extract from the document

Prices

Status

SN74FB1653PCA
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

SN74FB1653PCA
N1
Pin100
Package TypePCA
Industry STD TermHLQFP
JEDEC CodeS-PQFP-G
Package QTY90
CarrierJEDEC TRAY (10+1)
Device MarkingFB1653
Width (mm)14
Length (mm)14
Thickness (mm)1.4
Pitch (mm).5
Max Height (mm)1.6
Mechanical DataDownload

Parametrics

Parameters / ModelsSN74FB1653PCA
SN74FB1653PCA
Bits17
F @ Nom Voltage(Max), Mhz90
ICC @ Nom Voltage(Max), mA140
Operating Temperature Range, C0 to 70
Output Drive (IOL/IOH)(Max), mA100/-32
Package GroupHLQFP
Package Size: mm2:W x L, PKG100HLQFP: 256 mm2: 16 x 16(HLQFP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyFB
VCC(Max), V5.5
VCC(Min), V4.5
Voltage(Nom), V5
tpd @ Nom Voltage(Max), ns15.4

Eco Plan

SN74FB1653PCA
RoHSCompliant

Application Notes

  • Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C)
    PDF, 65 Kb, Revision: C, File published: Mar 1, 1997
    BTL- and Futurebus-compatible transceivers and switching level meet the requirements of today?s high-speed data-communications and provide significant performance advantages over conventional backplane implementations. This document discusses the current and next generation of BTL/Futurebus Transceivers and the design trade-offs required when using these devices.
  • GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)
    PDF, 184 Kb, Revision: A, File published: Mar 1, 1997
    GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided.
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, File published: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Model Line

Series: SN74FB1653 (1)

Manufacturer's Classification

  • Semiconductors> Logic> Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)