Datasheet Texas Instruments SN74GTL2006
| Manufacturer | Texas Instruments |
| Series | SN74GTL2006 |
13-Bit GTL-/GTL/GTL+ To LVTTL Translator
Datasheets
Prices
Status
| SN74GTL2006PWR | |
|---|---|
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| SN74GTL2006PWR | |
|---|---|
| N | 1 |
| Pin | 28 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | GK2006 |
| Width (mm) | 4.4 |
| Length (mm) | 9.7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Eco Plan
| SN74GTL2006PWR | |
|---|---|
| RoHS | Compliant |
Application Notes
- GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A)PDF, 184 Kb, Revision: A, File published: Mar 1, 1997
GTL and BTL transceivers provide high-performance, excellent signal integrity and cost-effectiveness in high-speed backplane and point-to-point applications. This document discusses the GTL and BTL devices input/output (I/O) structure, power consumption, simultaneous switching, slew rate, and signal integrity. Design considerations for using these devices are provided. - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, File published: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Model Line
Series: SN74GTL2006 (1)
Manufacturer's Classification
- Semiconductors> Logic> Universal Bus Function> Universal Bus Transceiver (UBT)
