Datasheet Texas Instruments SN74LS112A
Manufacturer | Texas Instruments |
Series | SN74LS112A |
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset
Datasheets
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear datasheet
PDF, 1.3 Mb, File published: Mar 1, 1988
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Prices
Status
SN74LS112AD | SN74LS112ADR | SN74LS112ADRE4 | SN74LS112AN | SN74LS112AN3 | SN74LS112ANSR | |
---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | No | Yes |
Packaging
SN74LS112AD | SN74LS112ADR | SN74LS112ADRE4 | SN74LS112AN | SN74LS112AN3 | SN74LS112ANSR | |
---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 |
Pin | 16 | 16 | 16 | 16 | 16 | 16 |
Package Type | D | D | D | N | N | NS |
Industry STD Term | SOIC | SOIC | SOIC | PDIP | PDIP | SOP |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T | R-PDSO-G |
Package QTY | 40 | 2500 | 2500 | 25 | 2000 | |
Carrier | TUBE | LARGE T&R | LARGE T&R | TUBE | LARGE T&R | |
Device Marking | LS112A | LS112A | LS112A | SN74LS112AN | 74LS112A | |
Width (mm) | 3.91 | 3.91 | 3.91 | 6.35 | 6.35 | 5.3 |
Length (mm) | 9.9 | 9.9 | 9.9 | 19.3 | 19.3 | 10.3 |
Thickness (mm) | 1.58 | 1.58 | 1.58 | 3.9 | 3.9 | 1.95 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | 2.54 | 2.54 | 1.27 |
Max Height (mm) | 1.75 | 1.75 | 1.75 | 5.08 | 5.08 | 2 |
Mechanical Data | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | SN74LS112AD | SN74LS112ADR | SN74LS112ADRE4 | SN74LS112AN | SN74LS112AN3 | SN74LS112ANSR |
---|---|---|---|---|---|---|
Approx. Price (US$) | 0.22 | 1ku | |||||
Bits | 2 | 2 | 2 | 2 | 2 | |
Bits(#) | 2 | |||||
F @ Nom Voltage(Max), Mhz | 35 | 35 | 35 | 35 | 35 | |
F @ Nom Voltage(Max)(Mhz) | 35 | |||||
ICC @ Nom Voltage(Max), mA | 6 | 6 | 6 | 6 | 6 | |
ICC @ Nom Voltage(Max)(mA) | 6 | |||||
Input Type | TTL | |||||
Output Drive (IOL/IOH)(Max), mA | -0.4/8 | -0.4/8 | -0.4/8 | -0.4/8 | -0.4/8 | |
Output Drive (IOL/IOH)(Max)(mA) | -0.4/8 | |||||
Output Type | TTL | |||||
Package Group | SOIC | SOIC | SOIC | PDIP | PDIP | SO |
Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | See datasheet (PDIP) | 16SO: 80 mm2: 7.8 x 10.2(SO) | |
Package Size: mm2:W x L (PKG) | See datasheet (PDIP) | |||||
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No | No | No |
Technology Family | LS | LS | LS | LS | LS | LS |
VCC(Max), V | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | |
VCC(Max)(V) | 5.25 | |||||
VCC(Min), V | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | |
VCC(Min)(V) | 4.75 | |||||
Voltage(Nom), V | 5 | 5 | 5 | 5 | 5 | |
Voltage(Nom)(V) | 5 | |||||
tpd @ Nom Voltage(Max), ns | 20 | 20 | 20 | 20 | 20 | |
tpd @ Nom Voltage(Max)(ns) | 20 |
Eco Plan
SN74LS112AD | SN74LS112ADR | SN74LS112ADRE4 | SN74LS112AN | SN74LS112AN3 | SN74LS112ANSR | |
---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Not Compliant | Compliant |
Pb Free | No | Yes |
Application Notes
- Designing with the SN54/74LS123 (Rev. A)PDF, 118 Kb, Revision: A, File published: Mar 1, 1997
The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and
Model Line
Series: SN74LS112A (6)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop