Datasheet Texas Instruments SN74LVT16240

Manufacturer	Texas Instruments
Series	SN74LVT16240

Datasheets

Prices

Status

Packaging

Parametrics

Parameters / Models	SN74LVT16240DGGR	SN74LVT16240DL	SN74LVT16240DLR
Bits	16	16	16
F @ Nom Voltage(Max), Mhz	160	160	160
ICC @ Nom Voltage(Max), mA	0.005	0.005	0.005
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), mA	-32/64	-32/64	-32/64
Package Group	TSSOP	SSOP	SSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)	48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
Rating	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No
Technology Family	LVT	LVT	LVT
VCC(Max), V	3.6	3.6	3.6
VCC(Min), V	2.7	2.7	2.7
Voltage(Nom), V	3.3	3.3	3.3
tpd @ Nom Voltage(Max), ns	4	4	4

Eco Plan

Application Notes

• Download
  LVT Family Characteristics (Rev. A)
  PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
  To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
• Download
  LVT-to-LVTH Conversion
  PDF, 84 Kb, File published: Dec 8, 1998
  Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Model Line

Manufacturer's Classification

• Semiconductors> Logic> Buffer/Driver/Transceiver> Inverting Buffer/Driver