Datasheet Texas Instruments SN74LVT8996PWR

3.3-V ABT 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE STD 1149.1 (JTAG) TAP Transceiver 24-TSSOP -40 to 85

Datasheets

PDF, 1.3 Mb, Revision: A, File published: Dec 2, 1999

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Bits	10
ICC @ Nom Voltage(Max)	20 mA
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Package Group	TSSOP
Package Size: mm2:W x L	24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) PKG
Rating	Catalog
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V

RoHS

Compliant

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LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Kb, File published: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Series: SN74LVT8996 (4)