Datasheet Texas Instruments SN74SSTU32864D
| Manufacturer | Texas Instruments |
| Series | SN74SSTU32864D |
25-Bit Configurable Registered Buffer With SSTL_18 Inputs and Outputs
Datasheets
25-Bit Configurable Registered Buffer With SSTL_18 Inputs and Outputs (Rev. A)
PDF, 475 Kb, Revision: A, File published: Mar 14, 2005
Prices
Status
| SN74SSTU32864DZKER | |
|---|---|
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| SN74SSTU32864DZKER | |
|---|---|
| N | 1 |
| Pin | 96 |
| Package Type | ZKE |
| Industry STD Term | BGA MICROSTAR |
| JEDEC Code | R-PBGA-N |
| Device Marking | SU864D |
| Width (mm) | 5.5 |
| Length (mm) | 13.5 |
| Thickness (mm) | .85 |
| Pitch (mm) | .8 |
| Max Height (mm) | 1.4 |
| Mechanical Data | Download |
Eco Plan
| SN74SSTU32864DZKER | |
|---|---|
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- DDR2 Memory Interface Clocks and Registers - OverviewPDF, 308 Kb, File published: Mar 25, 2009
This application report gives an overview of the existing JEDEC DDR2 Register and PLL Buffer specifications and compliant TI devices.
Model Line
Series: SN74SSTU32864D (1)
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Clock & Timing Products> Memory Interface Clock and Register
