Datasheet Texas Instruments SN74SSTV32852

Manufacturer	Texas Instruments
Series	SN74SSTV32852

24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs

Datasheets

Download

PDF, 427 Kb, Revision: C, File published: Feb 5, 2003

Extract from the document

Prices

Status

	HPA00023GKFR	SN74SSTV32852GKFR	SN74SSTV32852ZKFR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	No	Yes

Packaging

	HPA00023GKFR	SN74SSTV32852GKFR	SN74SSTV32852ZKFR
N	1	2	3
Pin	114	114	114
Package Type	GKF	GKF	ZKF
Industry STD Term	BGA MICROSTAR	BGA MICROSTAR	BGA MICROSTAR
JEDEC Code	R-PBGA-N	R-PBGA-N	R-PBGA-N
Package QTY	1000	1000	1000
Carrier	LARGE T&R	LARGE T&R	LARGE T&R
Device Marking	SV852	SV852	SV852
Width (mm)	5.5	5.5	5.5
Length (mm)	16	16	16
Thickness (mm)	.9	.9	.95
Pitch (mm)	.8	.8	.8
Max Height (mm)	1.4	1.4	1.4
Mechanical Data	Download	Download	Download

Parametrics

Parameters / Models	HPA00023GKFR	SN74SSTV32852GKFR	SN74SSTV32852ZKFR
Number of Outputs	48	48	48
Operating Temperature Range, C	0 to 70	0 to 70	0 to 70
Output Drive, mA	20	20	20
Package Group	BGA MICROSTAR	BGA MICROSTAR	LFBGA
Package Size: mm2:W x L, PKG	114BGA MICROSTAR: 88 mm2: 5.5 x 16(BGA MICROSTAR)	114BGA MICROSTAR: 88 mm2: 5.5 x 16(BGA MICROSTAR)	114LFBGA: 88 mm2: 5.5 x 16(LFBGA)
Rating	Catalog	Catalog	Catalog
VCC, V	2.5	2.5	2.5

Eco Plan

	HPA00023GKFR	SN74SSTV32852GKFR	SN74SSTV32852ZKFR
RoHS	See ti.com	See ti.com	Compliant

Application Notes

Download
56-Pin Quad Flatpack No-Lead Logic Package
PDF, 275 Kb, File published: Feb 7, 2003
Texas Instruments (TI) Quad Flatpack No-Lead (QFN) 56-terminal package complies with JEDEC standard MO-220, allows for board miniaturization, and holds several advantages over traditional SOIC, TQFP, TSSOP, and TVSOP packaging. This package, designated RGQ by TI, physically is smaller than traditional leaded solutions, has a smaller routing area, improved thermal performance, and improved electric
Download
Application of the SN74SSTV32852 in Stacked, Low-Profile (1U) PC-1600/2100 DIMMs
PDF, 445 Kb, File published: Nov 7, 2001
Many memory-module manufacturers are turning to low-profile (1U) DIMM designs that significantly increase memory density in computer workstations and servers. The reduction in DIMM height consequently affects the design and layout of the boards. The stacked 1U DIMMs present a unique and challenging problem due partly to the reduction in area for mounting components and also due to the load. The TI
Download
Application of the SN74SSTVF16857 in Planar PC2700 (DDR-333) RDIMMs
PDF, 359 Kb, File published: Jan 10, 2003
The high-capacity memory modules used in servers and workstations present a complex load to the memory controller used in these high-reliability, high-performance systems. To meet the demands of stable functionality over a broad spectrum of operating environments and system timing needs, and to support data integrity, these dual in-line memory modules (DIMMs) require the use of registers in the ad
Download
Low-Power Support Using Texas Instruments SN74SSTV16857 and SN74SSTV16859
PDF, 138 Kb, File published: Feb 9, 2001
The Texas Instruments SN74SSTV16857 and SN74SSTV16859 registers support the low-power mode of the DDR-DIMM. This application report explains the low-power mode and the features of the registers that support the low-power mode. Also, the considerations that the system designer must be aware of when implementing the low-power state of a registered memory module are explained. The sequence that must

Model Line

Series: SN74SSTV32852 (3)

HPA00023GKFR SN74SSTV32852GKFR SN74SSTV32852ZKFR

Manufacturer's Classification

Semiconductors> Space & High Reliability> Clock & Timing Products> Memory Interface Clock and Register