Datasheet Texas Instruments SN74SSTV32852-EP

ManufacturerTexas Instruments
SeriesSN74SSTV32852-EP
Datasheet Texas Instruments SN74SSTV32852-EP

Enhanced Product 24 Bit To 48 Bit Registered Buffer With Sstl_2 Inputs And Outputs

Datasheets

24 Bit To 48 Bit Registered Buffer With SSTL_2 Inputs And Outputs datasheet
PDF, 368 Kb, File published: Aug 16, 2007
Extract from the document

Prices

Status

CSSTV32852GKFREPV62/08602-01XA
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNo

Packaging

CSSTV32852GKFREPV62/08602-01XA
N12
Pin114114
Package TypeGKFGKF
Industry STD TermBGA MICROSTARBGA MICROSTAR
JEDEC CodeR-PBGA-NR-PBGA-N
Package QTY10001000
CarrierLARGE T&RLARGE T&R
Device MarkingSV852IEPSV852IEP
Width (mm)5.55.5
Length (mm)1616
Thickness (mm).9.9
Pitch (mm).8.8
Max Height (mm)1.41.4
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsCSSTV32852GKFREP
CSSTV32852GKFREP
V62/08602-01XA
V62/08602-01XA
Number of Outputs4848
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive, mA2020
Package GroupBGA MICROSTARBGA MICROSTAR
Package Size: mm2:W x L, PKG114BGA MICROSTAR: 88 mm2: 5.5 x 16(BGA MICROSTAR)114BGA MICROSTAR: 88 mm2: 5.5 x 16(BGA MICROSTAR)
RatingHiRel Enhanced ProductHiRel Enhanced Product
VCC, V2.52.5

Eco Plan

CSSTV32852GKFREPV62/08602-01XA
RoHSSee ti.comSee ti.com

Application Notes

  • 56-Pin Quad Flatpack No-Lead Logic Package
    PDF, 275 Kb, File published: Feb 7, 2003
    Texas Instruments (TI) Quad Flatpack No-Lead (QFN) 56-terminal package complies with JEDEC standard MO-220, allows for board miniaturization, and holds several advantages over traditional SOIC, TQFP, TSSOP, and TVSOP packaging. This package, designated RGQ by TI, physically is smaller than traditional leaded solutions, has a smaller routing area, improved thermal performance, and improved electric
  • Application of the SN74SSTV32852 in Stacked, Low-Profile (1U) PC-1600/2100 DIMMs
    PDF, 445 Kb, File published: Nov 7, 2001
    Many memory-module manufacturers are turning to low-profile (1U) DIMM designs that significantly increase memory density in computer workstations and servers. The reduction in DIMM height consequently affects the design and layout of the boards. The stacked 1U DIMMs present a unique and challenging problem due partly to the reduction in area for mounting components and also due to the load. The TI
  • Application of the SN74SSTVF16857 in Planar PC2700 (DDR-333) RDIMMs
    PDF, 359 Kb, File published: Jan 10, 2003
    The high-capacity memory modules used in servers and workstations present a complex load to the memory controller used in these high-reliability, high-performance systems. To meet the demands of stable functionality over a broad spectrum of operating environments and system timing needs, and to support data integrity, these dual in-line memory modules (DIMMs) require the use of registers in the ad
  • Low-Power Support Using Texas Instruments SN74SSTV16857 and SN74SSTV16859
    PDF, 138 Kb, File published: Feb 9, 2001
    The Texas Instruments SN74SSTV16857 and SN74SSTV16859 registers support the low-power mode of the DDR-DIMM. This application report explains the low-power mode and the features of the registers that support the low-power mode. Also, the considerations that the system designer must be aware of when implementing the low-power state of a registered memory module are explained. The sequence that must

Model Line

Series: SN74SSTV32852-EP (2)

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Clock & Timing Products> Memory Interface Clock and Register