Datasheet Texas Instruments SN74V235-7PAG
Manufacturer | Texas Instruments |
Series | SN74V235 |
Part Number | SN74V235-7PAG |
2048 x 18 Synchronous FIFO Memory 64-TQFP 0 to 70
Datasheets
SN74V215, SN74V225, SN74V235, SN74V245 datasheet
PDF, 604 Kb, Revision: E, File published: Sep 13, 2002
Extract from the document
Prices
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 64 |
Package Type | PAG |
Industry STD Term | TQFP |
JEDEC Code | S-PQFP-G |
Package QTY | 160 |
Carrier | JEDEC TRAY (10+1) |
Device Marking | V235-7 |
Width (mm) | 10 |
Length (mm) | 10 |
Thickness (mm) | 1 |
Pitch (mm) | .5 |
Max Height (mm) | 1.2 |
Mechanical Data | Download |
Parametrics
Package Group | TQFP |
Package Size: mm2:W x L | 64TQFP: 144 mm2: 12 x 12(TQFP) PKG |
Schmitt Trigger | No |
Eco Plan
RoHS | Compliant |
Application Notes
- Designing With TI SN74V2x5 FIFO Programmable FlagsPDF, 91 Kb, File published: May 14, 2001
Many FIFOs being released today include programmable almost-empty and almost-full flags. TI?s newly released SN74V2x5 FIFOs are functionally equivalent to devices offered by IDT and are pin-for-pin compatible. The programmable flags can be used to provide interrupt signals when used in digital signal processor (DSP) and microprocessor applications. Additional configurations use the programmable fl - Power-Dissipation Calculations for TI FIFO Products (Rev. A)PDF, 106 Kb, Revision: A, File published: Mar 1, 1996
Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36 - Using TI FIFOs to Interface High-Speed Data Converters With TI TMS320 DSPsPDF, 249 Kb, File published: Jun 8, 2001
Most high-speed data converters cannot be connected directly to a digital signal processor (DSP). The required transfer rates would tie up most of the DSP's I/O bandwidth. A FIFO is an appropriate solution for this problem because it can buffer a large block of data, and the DSP can read data from the FIFO in a burst mode. This is much more efficient compared to single reads for every sampled valu
Model Line
Series: SN74V235 (3)
- SN74V235-10PAG SN74V235-15PAG SN74V235-7PAG
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > FIFO Register
Other Names:
SN74V2357PAG, SN74V235 7PAG