Datasheet Texas Instruments SN74V293

ManufacturerTexas Instruments
SeriesSN74V293
Datasheet Texas Instruments SN74V293

65536 x 18 Synchronous FIFO Memory

Datasheets

SN74V263, SN74V273, SN74V283, SN74V293 datasheet
PDF, 818 Kb, Revision: D, File published: Feb 12, 2003
Extract from the document

Prices

Status

SN74V293-10PZASN74V293-15PZASN74V293-15PZAG4SN74V293-6PZASN74V293-7PZA
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

Packaging

SN74V293-10PZASN74V293-15PZASN74V293-15PZAG4SN74V293-6PZASN74V293-7PZA
N12345
Pin8080808080
Package TypePZAPZAPZAPZAPZA
Industry STD TermLQFPLQFPLQFPLQFPLQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY9090909090
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device MarkingV293-10V293-15V293-15V293-6V293-7
Width (mm)1414141414
Length (mm)1414141414
Thickness (mm)1.41.41.41.41.4
Pitch (mm).65.65.65.65.65
Max Height (mm)1.61.61.61.61.6
Mechanical DataDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74V293-10PZA
SN74V293-10PZA
SN74V293-15PZA
SN74V293-15PZA
SN74V293-15PZAG4
SN74V293-15PZAG4
SN74V293-6PZA
SN74V293-6PZA
SN74V293-7PZA
SN74V293-7PZA
Package GroupLQFPLQFPLQFPLQFPLQFP
Package Size: mm2:W x L, PKG80LQFP: 256 mm2: 16 x 16(LQFP)80LQFP: 256 mm2: 16 x 16(LQFP)80LQFP: 256 mm2: 16 x 16(LQFP)80LQFP: 256 mm2: 16 x 16(LQFP)80LQFP: 256 mm2: 16 x 16(LQFP)
Schmitt TriggerNoNoNoNoNo

Eco Plan

SN74V293-10PZASN74V293-15PZASN74V293-15PZAG4SN74V293-6PZASN74V293-7PZA
RoHSCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Design Considerations of SN74V293 FIFO in a MicroStar BGA(TM) Package (Rev. A)
    PDF, 112 Kb, Revision: A, File published: Apr 10, 2002
    Texas Instruments? near-chip-scale MicroSTAR BGA? package is gaining in popularity for applications where board space and/or weight are significant design factors. However, no less-significant design factors are those associated with electronic coupling between signal paths when leading-edge high-speed digital signals are closely spaced.With a few simple routing and trace-location consideratio
  • Power-Dissipation Calculations for TI FIFO Products (Rev. A)
    PDF, 106 Kb, Revision: A, File published: Mar 1, 1996
    Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> FIFO Register