Datasheet Texas Instruments SN74V3640-7PEU
Manufacturer | Texas Instruments |
Series | SN74V3640 |
Part Number | SN74V3640-7PEU |
1024 x 36 Synchronous FIFO Memory 128-LQFP 0 to 70
Datasheets
1024x36, 2048x36, 4096x36, 8192x36, 16384x36, 32768x36 3.3-V CMOS FIFO Memories datasheet
PDF, 730 Kb, Revision: A, File published: Mar 5, 2003
Extract from the document
Prices
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 128 |
Package Type | PEU |
Industry STD Term | LQFP |
JEDEC Code | R-PQFP-G |
Package QTY | 72 |
Carrier | JEDEC TRAY (5+1) |
Device Marking | V3640-7 |
Width (mm) | 14 |
Length (mm) | 20 |
Thickness (mm) | 1.4 |
Pitch (mm) | .5 |
Max Height (mm) | 1.6 |
Mechanical Data | Download |
Parametrics
Package Group | LQFP |
Package Size: mm2:W x L | 128LQFP: 352 mm2: 16 x 22(LQFP) PKG |
Schmitt Trigger | No |
Eco Plan
RoHS | Compliant |
Application Notes
- Power-Dissipation Calculations for TI FIFO Products (Rev. A)PDF, 106 Kb, Revision: A, File published: Mar 1, 1996
Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36
Model Line
Series: SN74V3640 (1)
- SN74V3640-7PEU
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > FIFO Register
Other Names:
SN74V36407PEU, SN74V3640 7PEU