Datasheet Texas Instruments SN75LVDS32DR
| Manufacturer | Texas Instruments |
| Series | SN75LVDS32 |
| Part Number | SN75LVDS32DR |
Quad High-Speed Differential Receivers 16-SOIC 0 to 70
Datasheets
High-Speed Differential Line Receivers datasheet
PDF, 544 Kb, Revision: B, File published: Jun 22, 2001
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | 75LVDS32 |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Device Type | Receiver |
| ESD HBM | 8 kV |
| Function | Receiver |
| ICC(Max) | 18 mA |
| Input Signal | LVDS |
| No. of Rx | 4 |
| Operating Temperature Range | 0 to 70 C |
| Output Signal | LVTTL |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Protocols | LVDS |
| Signaling Rate | 155 Mbps |
Eco Plan
| RoHS | Compliant |
Model Line
Series: SN75LVDS32 (2)
- SN75LVDS32D SN75LVDS32DR
Manufacturer's Classification
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points
