Datasheet Texas Instruments SN75LVDS9637
| Manufacturer | Texas Instruments |
| Series | SN75LVDS9637 |
High-Speed Differential Line Receivers
Datasheets
High-Speed Differential Line Receivers datasheet
PDF, 544 Kb, Revision: B, File published: Jun 22, 2001
Extract from the document
Prices
Status
| SN75LVDS9637D | |
|---|---|
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| SN75LVDS9637D | |
|---|---|
| N | 1 |
| Pin | 8 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 75 |
| Carrier | TUBE |
| Device Marking | DF637 |
| Width (mm) | 3.91 |
| Length (mm) | 4.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Parameters / Models | SN75LVDS9637D |
|---|---|
| Device Type | Receiver |
| ESD HBM, kV | 8 |
| Function | Receiver |
| ICC(Max), mA | 10 |
| Input Signal | LVDS |
| No. of Rx | 2 |
| Operating Temperature Range, C | 0 to 70 |
| Output Signal | LVTTL |
| Package Group | SOIC |
| Package Size: mm2:W x L, PKG | 8SOIC: 29 mm2: 6 x 4.9(SOIC) |
| Protocols | LVDS |
| Signaling Rate, Mbps | 155 |
Eco Plan
| SN75LVDS9637D | |
|---|---|
| RoHS | Compliant |
Model Line
Series: SN75LVDS9637 (1)
Manufacturer's Classification
- Semiconductors> Interface> LVDS/M-LVDS/ECL/CML> LVDS PHY (<800Mbps)
