Datasheet Texas Instruments TDA2HA-17
| Manufacturer | Texas Instruments |
| Series | TDA2HA-17 |
SoC Processor w/ Vision Acceleration for ADAS Applications
Datasheets
Prices
Status
| TDA2HABDQAASQ1 | TDA2HABDQAASRQ1 | TDA2HABRQAASQ1 | TDA2HABRQAASRQ1 | |
|---|---|---|---|---|
| Lifecycle Status | Preview (Device has been announced but is not in production. Samples may or may not be available) | Preview (Device has been announced but is not in production. Samples may or may not be available) | Preview (Device has been announced but is not in production. Samples may or may not be available) | Preview (Device has been announced but is not in production. Samples may or may not be available) |
| Manufacture's Sample Availability | No | No | No | No |
Packaging
| TDA2HABDQAASQ1 | TDA2HABDQAASRQ1 | TDA2HABRQAASQ1 | TDA2HABRQAASRQ1 | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 625 | 625 | 625 | 625 |
| Package Type | AAS | AAS | AAS | AAS |
| Width (mm) | 17 | 17 | 17 | 17 |
| Length (mm) | 17 | 17 | 17 | 17 |
| Thickness (mm) | 2.48 | 2.39 | 2.48 | 2.39 |
| Mechanical Data | Download | Download | Download | Download |
| Device Marking | TDA |
Parametrics
| Parameters / Models | TDA2HABDQAASQ1 | TDA2HABDQAASRQ1 | TDA2HABRQAASQ1 | TDA2HABRQAASRQ1 |
|---|---|---|---|---|
| ARM CPU | 1 ARM Cortex-A15 | 1 ARM Cortex-A15 | 1 ARM Cortex-A15 | 1 ARM Cortex-A15 |
| ARM MHz (Max.) | 500 750 | 500 750 | 500 750 | 500 750 |
| CAN(#) | 2 | 2 | 2 | 2 |
| Co-Processor(s) | 2 ARM Cortex-M4 | 2 ARM Cortex-M4 | 2 ARM Cortex-M4 | 2 ARM Cortex-M4 |
| DSP | 2 C66x | 2 C66x | 2 C66x | 2 C66x |
| DSP MHz (Max.) | 500 750 | 500 750 | 500 750 | 500 750 |
| Display Options | 1 HDMIOUT 3 LCD OUT | 1 HDMIOUT 3 LCD OUT | 1 HDMIOUT 3 LCD OUT | 1 HDMIOUT 3 LCD OUT |
| EMAC | 2-port 1Gb switch 10/100/1000 | 2-port 1Gb switch 10/100/1000 | 2-port 1Gb switch 10/100/1000 | 2-port 1Gb switch 10/100/1000 |
| EMIF | 1 DDR2 1 DDR3 1 DDR3L | 1 DDR2 1 DDR3 1 DDR3L | 1 DDR2 1 DDR3 1 DDR3L | 1 DDR2 1 DDR3 1 DDR3L |
| EMIF Speed | DDR2-800 DDR3-1066 | DDR2-800 DDR3-1066 | DDR2-800 DDR3-1066 | DDR2-800 DDR3-1066 |
| EVE MHz | 650 500 | 650 500 | 650 500 | 650 500 |
| Embedded Vision Engine (EVE) | 2 | 2 | 2 | 2 |
| GPIO | 247 | 247 | 247 | 247 |
| Hardware Accelerators | 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking | 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking | 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking | 1 Image Video Accelerator 2 Viterbi Decoder Audio Tracking |
| I2C | 5 | 5 | 5 | 5 |
| MMC/SD | 1x eMMC 8b 1x SDIO 8b 1x SDIO4b | 1x eMMC 8b 1x SDIO 8b 1x SDIO4b | 1x eMMC 8b 1x SDIO 8b 1x SDIO4b | 1x eMMC 8b 1x SDIO 8b 1x SDIO4b |
| McASP | 5 | 5 | 5 | 5 |
| Other On-Chip Memory | 2.5 MB | 2.5 MB | 2.5 MB | 2.5 MB |
| PCIe | 1 PCIe Gen2 | 1 PCIe Gen2 | 1 PCIe Gen2 | 1 PCIe Gen2 |
| Package Group | FCBGA | FCBGA | FCBGA | FCBGA |
| Package Size: mm2:W x L (PKG) | See datasheet (FCBGA) | See datasheet (FCBGA) | See datasheet (FCBGA) | See datasheet (FCBGA) |
| Pin/Package | 625FCBGA | 625FCBGA | 625FCBGA | 625FCBGA |
| QSPI | 1 | 1 | 1 | 1 |
| Rating | Automotive | Automotive | Automotive | Automotive |
| SPI | 4 | 4 | 4 | 4 |
| Serial I/O | I2C UART SPI CAN USB | I2C UART SPI CAN USB | I2C UART SPI CAN USB | I2C UART SPI CAN USB |
| UART | 10 | 10 | 10 | 10 |
| Video Input Ports | 7 | 7 | 7 | 7 |
| Watchdog Timers | 1 | 1 | 1 | 1 |
Eco Plan
| TDA2HABDQAASQ1 | TDA2HABDQAASRQ1 | TDA2HABRQAASQ1 | TDA2HABRQAASRQ1 | |
|---|---|---|---|---|
| RoHS | Not Compliant | Compliant | Not Compliant | Not Compliant |
| Pb Free | No | Yes | No | No |
Application Notes
- DSS BT656 Workaround for TDA2xPDF, 141 Kb, File published: Mar 29, 2016
- TDA2x/TDA2E PerformancePDF, 6.6 Mb, File published: Jul 19, 2016
This application report provides information on the TDA2xx and TDA2ex device throughput performances and describes the TDA2xx and TDA2ex System-on-Chip (SoC) architecture, data path infrastructure, and constraints that affect the throughput and different optimization techniques for optimum system performance. This document also provides information on the maximum possible throughput performance of - ADAS Power ManagementPDF, 1.3 Mb, File published: Mar 7, 2016
- DSS Bit Exact OutputPDF, 115 Kb, File published: Jan 11, 2016
The display subsystem (DSS) in TDA2xx, TDA2Ex and TDA3xx platform is used for displaying video data to external devices. But DSS can also be used as a high-speed data transfer port for any non video data. One of the basic requirements of the data transfer port is that the data that is present in the memory should not be modified before the data is sent out, which means the data sent should be bit - Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A)PDF, 148 Kb, Revision: A, File published: Dec 15, 2016
This application report lists various quality-of-service (QoS) knobs that are implemented in DRA74x, DRA75x and TDA2x system-on-chip (SoC) family of devices. These QoS knobs aid to optimize overall system performance while running several concurrent application scenarios. - Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x DevicePDF, 612 Kb, File published: Aug 13, 2014
This application report provides a methodology through which performance issues can be identified and fixed in systems using DRA74x, DRA75x, TDA2x and TDA3x family of devices. - A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. A)PDF, 3.2 Mb, Revision: A, File published: Aug 19, 2016
Being able to look into the state of the device when an application fails to run as expected is a key enabler while debugging the application. This application report walks through the different steps required to setup the TI Code Composer Studioв„ў (CCS), as well as how to debug applications on the DRA7x, TDA2x and TDA3x family of devices. The document starts with describing basic CCS debugging tec
Model Line
Series: TDA2HA-17 (4)
Manufacturer's Classification
- Semiconductors> Processors> Automotive Processors> TDAx ADAS SoCs
