Datasheet Analog Devices AD8512AR

Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifiers AD8510/AD8512/AD8513 Date Sheet PIN CONFIGURATIONS
8 NC NULL 1 7 V+ –IN 2 TOP VIEW
6 OUT
(Not to Scale)
V– 4
5 NULL NC = NO CONNECT Figure 1. 8-Lead MSOP (RM Suffix)
OUT A 1
–IN A 2
V– 4 AD8512 8 V+ 7 OUT B TOP VIEW
6 –IN B
(Not to Scale)
5 +IN B NC 7 +IN 3
02729-003 NC = NO CONNECT 8 AD8510 V+
TOP VIEW
6 OUT
(Not to Scale)
V– 4
5 NULL +IN 3 +IN A 3 Instrumentation
Multipole filters
Precision current measurement
Photodiode amplifiers
Sensors …

Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifier AD8512-EP Enhanced Product PIN CONFIGURATION Fast settling time: 500 ns to 0.1%
Low offset voltage: 1.0 mV maximum at VS = ±15 V
Low offset voltage drift: 1.7 µV/°C typical
Low input bias current: 25 pA typical at VS = ±15 V
Dual-supply operation: ±5 V to ±15 V
Low noise: 8.0 nV/√Hz typical at f = 1 kHz
Low distortion: 0.0005%
No phase reversal
Unity gain stable OUT A 1 8 V+ –IN A 2 AD8512-EP 7 OUT B +IN A 3 TOP VIEW
(Not to Scale) 6 –IN B 5 +IN B V– 4 17170-002 FEATURES Figure 1. ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC
standard)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available on request APPLICATIONS
Instrumentation
Multipole filters
Precision current measurement
Photodiode amplifiers …

Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifiers AD8510/AD8512/AD8513 Date Sheet PIN CONFIGURATIONS
-IN 2 8 NC NULL 1 7 V+ -IN 2 TOP VIEW
6 OUT
(Not to Scale)
V- 4
5 NULL NC 7 +IN 3
02729-003 NC = NO CONNECT 8 AD8510 V+
TOP VIEW
6 OUT
(Not to Scale)
V- 4
5 NULL +IN 3 NC = NO CONNECT Figure 2. 8-Lead SOIC_N (R Suffix) OUT A 1 OUT A 1 -IN A 2
V- 4 AD8512 8 V+ 7 OUT B TOP VIEW
6 -IN B
(Not to Scale)
5 +IN B -IN A 2 Figure 3. 8-Lead MSOP (RM Suffix) +IN A 3
V- 4 AD8512 8 V+ 7 OUT B TOP VIEW
6 -IN B
(Not to Scale)
5 +IN B Figure 4. 8-Lead SOIC_N (R Suffix) OUT A 1 14 OUT D OUT A 1 14 OUT D -IN A 2 13 -IN D -IN A 2 13 -IN D +IN A 3 12 +IN D +IN A 3 12 +IN D AD8513 9 -IN C 8 OUT C V+ 4 02729-005 -IN B 6
OUT B 7 AD8513 11 V-
TOP VIEW …