Datasheet Texas Instruments TLV1562
| Manufacturer | Texas Instruments |
| Series | TLV1562 |
10-Bit, 2 MSPS ADC Quad Ch. (Config.) w/mux, Pgmable Res. vs. Speed/Conversion Mode, Auto o
Datasheets
Low Power, Dual Sample-and-Hold Parallel Analog-to-Digital Converters datasheet
PDF, 600 Kb, File published: Sep 25, 1998
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Status
| TLV1562CPW | TLV1562CPWG4 | TLV1562IDW | TLV1562IPW | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No |
Packaging
| TLV1562CPW | TLV1562CPWG4 | TLV1562IDW | TLV1562IPW | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 28 | 28 | 28 | 28 |
| Package Type | PW | PW | DW | PW |
| Industry STD Term | TSSOP | TSSOP | SOIC | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 50 | 50 | 20 | 50 |
| Carrier | TUBE | TUBE | TUBE | TUBE |
| Device Marking | TV1562 | TV1562 | TLV1562I | TY1562 |
| Width (mm) | 4.4 | 4.4 | 7.5 | 4.4 |
| Length (mm) | 9.7 | 9.7 | 17.9 | 9.7 |
| Thickness (mm) | 1 | 1 | 2.35 | 1 |
| Pitch (mm) | .65 | .65 | 1.27 | .65 |
| Max Height (mm) | 1.2 | 1.2 | 2.65 | 1.2 |
| Mechanical Data | Download | Download | Download | Download |
Parametrics
| Parameters / Models | TLV1562CPW | TLV1562CPWG4 | TLV1562IDW | TLV1562IPW |
|---|---|---|---|---|
| # Input Channels | 4 | 4 | 4 | 4 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 2.7 | 2.7 | 2.7 | 2.7 |
| Architecture | Pipeline | Pipeline | Pipeline | Pipeline |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 1 | 1 | 1 | 1 |
| Input Range(Max), V | 3 | 3 | 3 | 3 |
| Input Range(Min), V | 0.8 | 0.8 | 0.8 | 0.8 |
| Input Type | Differential,Single-Ended | Differential,Single-Ended | Differential,Single-Ended | Differential,Single-Ended |
| Integrated Features | Oscillator | Oscillator | Oscillator | Oscillator |
| Interface | Parallel | Parallel | Parallel | Parallel |
| Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
| Operating Temperature Range, C | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 | -40 to 85,0 to 70 |
| Package Group | TSSOP | TSSOP | SOIC | TSSOP |
| Package Size: mm2:W x L, PKG | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) |
| Power Consumption(Typ), mW | 13.5 | 13.5 | 13.5 | 13.5 |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext | Ext | Ext | Ext |
| Resolution, Bits | 10 | 10 | 10 | 10 |
| SINAD, dB | 57.8 | 57.8 | 57.8 | 57.8 |
| SNR, dB | 58.1 | 58.1 | 58.1 | 58.1 |
| Sample Rate (max), SPS | 2MSPS | 2MSPS | 2MSPS | 2MSPS |
| Sample Rate(Max), MSPS | 2 | 2 | 2 | 2 |
| THD(Typ), dB | -68.8 | -68.8 | -68.8 | -68.8 |
Eco Plan
| TLV1562CPW | TLV1562CPWG4 | TLV1562IDW | TLV1562IPW | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
Application Notes
- Interfacing the TLV1562 Parallel ADC to the TMS320C54x DSPPDF, 311 Kb, File published: Jul 9, 1999
In this application report, we discuss the hardware and software interface of the TLV1562, 10-bit parallel-output analog-to-digital converter (ADC) to the TMS320C54x digital signal processor (DSP). The hardware interface board, or evaluation module (EVM), consists of the TLV1562 10-bit ADC, a THS5651 10-bit parallel-output communication digital-to-analog converter ((CommsDAC (TM)) and a TLC5618A s
Model Line
Series: TLV1562 (4)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
