Datasheet Texas Instruments TLV5619

Manufacturer	Texas Instruments
Series	TLV5619

12-Bit, Single Channel DAC, Parallel, Voltage Out, Low Power, Asynchronous Update

Datasheets

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PDF, 1.1 Mb, Revision: F, File published: Feb 29, 2004

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Prices

Status

	TLV5619CDW	TLV5619CDWG4	TLV5619CDWR	TLV5619CPW	TLV5619CPWG4	TLV5619CPWR	TLV5619IDW	TLV5619IDWG4	TLV5619IDWR	TLV5619IDWRG4	TLV5619IPW	TLV5619IPWG4	TLV5619IPWR	TLV5619IPWRG4	TLV5619QDW	TLV5619QDWG4	TLV5619QDWR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample Availability	No	No	No	Yes	No	No	No	No	Yes	No	No	No	No	No	No	No	No

Packaging

	TLV5619CDW	TLV5619CDWG4	TLV5619CDWR	TLV5619CPW	TLV5619CPWG4	TLV5619CPWR	TLV5619IDW	TLV5619IDWG4	TLV5619IDWR	TLV5619IDWRG4	TLV5619IPW	TLV5619IPWG4	TLV5619IPWR	TLV5619IPWRG4	TLV5619QDW	TLV5619QDWG4	TLV5619QDWR
N	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16	17
Pin	20	20	20	20	20	20	20	20	20	20	20	20	20	20	20	20	20
Package Type	DW	DW	DW	PW	PW	PW	DW	DW	DW	DW	PW	PW	PW	PW	DW	DW	DW
Industry STD Term	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	SOIC	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	TSSOP	SOIC	SOIC	SOIC
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	25	25	2000	70	70	2000	25	25	2000	2000	70	70	2000	2000		25
Carrier	TUBE	TUBE	LARGE T&R	TUBE	TUBE	LARGE T&R	TUBE	TUBE	LARGE T&R	LARGE T&R	TUBE	TUBE	LARGE T&R	LARGE T&R		TUBE
Device Marking	TLV5619C	TLV5619C	TLV5619C	TV5619	TV5619	TV5619	TLV5619I	TLV5619I	TLV5619I	TLV5619I	TY5619	TY5619	TY5619	TY5619		TLV5619Q
Width (mm)	7.5	7.5	7.5	4.4	4.4	4.4	7.5	7.5	7.5	7.5	4.4	4.4	4.4	4.4	7.5	7.5	7.5
Length (mm)	12.8	12.8	12.8	6.5	6.5	6.5	12.8	12.8	12.8	12.8	6.5	6.5	6.5	6.5	12.8	12.8	12.8
Thickness (mm)	2.35	2.35	2.35	1	1	1	2.35	2.35	2.35	2.35	1	1	1	1	2.35	2.35	2.35
Pitch (mm)	1.27	1.27	1.27	.65	.65	.65	1.27	1.27	1.27	1.27	.65	.65	.65	.65	1.27	1.27	1.27
Max Height (mm)	2.65	2.65	2.65	1.2	1.2	1.2	2.65	2.65	2.65	2.65	1.2	1.2	1.2	1.2	2.65	2.65	2.65
Mechanical Data	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download	Download

Parametrics

Parameters / Models	TLV5619CDW	TLV5619CDWG4	TLV5619CDWR	TLV5619CPW	TLV5619CPWG4	TLV5619CPWR	TLV5619IDW	TLV5619IDWG4	TLV5619IDWR	TLV5619IDWRG4	TLV5619IPW	TLV5619IPWG4	TLV5619IPWR	TLV5619IPWRG4	TLV5619QDW	TLV5619QDWG4	TLV5619QDWR
Approx. Price (US$)															5.04 \| 1ku		5.04 \| 1ku
Architecture															String
Code to Code Glitch(Typ), nV-sec	5	5	5	5	5	5	5	5	5	5	5	5	5	5		5
Code to Code Glitch(Typ)(nV-sec)															5		5
DAC Architecture	String	String	String	String	String	String	String	String	String	String	String	String	String	String		String	String
DAC Channels	1	1	1	1	1	1	1	1	1	1	1	1	1	1		1
DAC: Channels															1		1
Gain Error(Max), %FSR	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5	0.5		0.5
Gain Error(Max)(%FSR)															0.5		0.5
INL(Max), +/-LSB	4	4	4	4	4	4	4	4	4	4	4	4	4	4		4
INL(Max)(+/-LSB)															4		4
Interface	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel
Internal Reference Drift(Max)(ppm/degC)															N/A		N/A
Offset Error(Max), %	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A		N/A
Offset Error(Max)(%)															N/A		N/A
Operating Temperature Range, C	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85	0 to 70,-40 to 85		0 to 70,-40 to 85
Operating Temperature Range(C)															0 to 70 -40 to 85		0 to 70 -40 to 85
Output Range Max., mA/V	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1	5.1		5.1
Output Range Max.(mA)															5.1		5.1
Output Type	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage	Buffered Voltage
Package Group	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	SOIC	SOIC	SOIC	SOIC	TSSOP	TSSOP	TSSOP	TSSOP	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)		20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Package Size: mm2:W x L (PKG)															20SOIC: 132 mm2: 10.3 x 12.8(SOIC)		20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Power Consumption(Typ), mW	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3	4.3		4.3
Power Consumption(Typ)(mW)															4.3		4.3
Priority															1		1
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Reference: Type	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext	Ext
Resolution, Bits	12	12	12	12	12	12	12	12	12	12	12	12	12	12		12
Resolution(Bits)															12		12
Sample / Update Rate, MSPS	1	1	1	1	1	1	1	1	1	1	1	1	1	1		1
Sample / Update Rate(MSPS)															1		1
Settling Time, µs	1	1	1	1	1	1	1	1	1	1	1	1	1	1		1
Settling Time(Вµs)															1		1
Special Features	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Zero Code Error(Typ), mV	20	20	20	20	20	20	20	20	20	20	20	20	20	20		20
Zero Code Error(Typ)(mV)															20		20

Eco Plan

	TLV5619CDW	TLV5619CDWG4	TLV5619CDWR	TLV5619CPW	TLV5619CPWG4	TLV5619CPWR	TLV5619IDW	TLV5619IDWG4	TLV5619IDWR	TLV5619IDWRG4	TLV5619IPW	TLV5619IPWG4	TLV5619IPWR	TLV5619IPWRG4	TLV5619QDW	TLV5619QDWG4	TLV5619QDWR
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Not Compliant	Compliant	Not Compliant
Pb Free	No	No

Application Notes

Download
Interfacing the TLV5639 DAC to the TMS320C31 DSP
PDF, 131 Kb, File published: Feb 12, 2001
This application report discusses the implementation of an interface between the TLV5639 DAC and the TMS320C31 DSP. The TLV5619-5639EVM is used to demonstrate the complete circuit implementation. This EVM is the evaluation module for the TLV5639 and the TLV561 DACs that take care of all necessary signal manipulation for the control signals of the DAC. The TLV5639 is a 12-bit DAC with a microproces

Model Line

Series: TLV5619 (17)

TLV5619CDW TLV5619CDWG4 TLV5619CDWR TLV5619CPW TLV5619CPWG4 TLV5619CPWR TLV5619IDW TLV5619IDWG4 TLV5619IDWR TLV5619IDWRG4 TLV5619IPW TLV5619IPWG4 TLV5619IPWR TLV5619IPWRG4 TLV5619QDW TLV5619QDWG4 TLV5619QDWR

Manufacturer's Classification

Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)