Datasheet Texas Instruments TLV5629
Manufacturer | Texas Instruments |
Series | TLV5629 |
8-Bit 8-Ch. 1/3 us DAC, Ser. Input, Pgrmable Settling Time/Power Consump., Low Power, PowerDown
Datasheets
8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V, Low Pwr DAC with Pwr Dwn datasheet
PDF, 1.2 Mb, Revision: G, File published: Nov 14, 2008
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Status
TLV5629IDW | TLV5629IDWG4 | TLV5629IDWR | TLV5629IPW | TLV5629IPWG4 | TLV5629IPWR | TLV5629IPWRG4 | |
---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | Yes | No | Yes | No | Yes | Yes | No |
Packaging
TLV5629IDW | TLV5629IDWG4 | TLV5629IDWR | TLV5629IPW | TLV5629IPWG4 | TLV5629IPWR | TLV5629IPWRG4 | |
---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
Package Type | DW | DW | DW | PW | PW | PW | PW |
Industry STD Term | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 25 | 25 | 2000 | 70 | 70 | 2000 | 2000 |
Carrier | TUBE | TUBE | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
Device Marking | TLV5629I | TLV5629I | TLV5629I | TY5629 | TY5629 | TY5629 | TY5629 |
Width (mm) | 7.5 | 7.5 | 7.5 | 4.4 | 4.4 | 4.4 | 4.4 |
Length (mm) | 12.8 | 12.8 | 12.8 | 6.5 | 6.5 | 6.5 | 6.5 |
Thickness (mm) | 2.35 | 2.35 | 2.35 | 1 | 1 | 1 | 1 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
Max Height (mm) | 2.65 | 2.65 | 2.65 | 1.2 | 1.2 | 1.2 | 1.2 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | TLV5629IDW | TLV5629IDWG4 | TLV5629IDWR | TLV5629IPW | TLV5629IPWG4 | TLV5629IPWR | TLV5629IPWRG4 |
---|---|---|---|---|---|---|---|
Code to Code Glitch(Typ), nV-sec | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
DAC Architecture | String | String | String | String | String | String | String |
DAC Channels | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Gain Error(Max), %FSR | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 | 0.6 |
INL(Max), +/-LSB | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Interface | SPI | SPI | SPI | SPI | SPI | SPI | SPI |
Offset Error(Max), % | N/A | N/A | N/A | N/A | N/A | N/A | N/A |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Output Range Max., mA/V | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 | 5.1 |
Output Type | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage | Buffered Voltage |
Package Group | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
Power Consumption(Typ), mW | 18 | 18 | 18 | 18 | 18 | 18 | 18 |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Reference: Type | Ext | Ext | Ext | Ext | Ext | Ext | Ext |
Resolution, Bits | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Sample / Update Rate, MSPS | 0.283 | 0.283 | 0.283 | 0.283 | 0.283 | 0.283 | 0.283 |
Settling Time, µs | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Special Features | SDO | SDO | SDO | SDO | SDO | SDO | SDO |
Zero Code Error(Typ), mV | 30 | 30 | 30 | 30 | 30 | 30 | 30 |
Eco Plan
TLV5629IDW | TLV5629IDWG4 | TLV5629IDWR | TLV5629IPW | TLV5629IPWG4 | TLV5629IPWR | TLV5629IPWRG4 | |
---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Model Line
Series: TLV5629 (7)
Manufacturer's Classification
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> Precision DACs (=<10MSPS)