Datasheet Texas Instruments TLV571
| Manufacturer | Texas Instruments |
| Series | TLV571 |
8-Bit, 1.25 MSPS Single Ch., Hardware Config., Low Power w/Auto or S/W PowerDown
Datasheets
2.7 V To 5.5 V, 1-Channel, 8-Bit Parallel ADC datasheet
PDF, 515 Kb, Revision: A, File published: Feb 9, 2000
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Status
| TLV571IDW | TLV571IDWG4 | TLV571IPW | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No |
Packaging
| TLV571IDW | TLV571IDWG4 | TLV571IPW | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 24 | 24 | 24 |
| Package Type | DW | DW | PW |
| Industry STD Term | SOIC | SOIC | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 60 |
| Carrier | TUBE | TUBE | TUBE |
| Device Marking | TLV571I | TLV571I | TY571 |
| Width (mm) | 7.5 | 7.5 | 4.4 |
| Length (mm) | 15.4 | 15.4 | 7.8 |
| Thickness (mm) | 2.35 | 2.35 | 1 |
| Pitch (mm) | 1.27 | 1.27 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 1.2 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | TLV571IDW | TLV571IDWG4 | TLV571IPW |
|---|---|---|---|
| # Input Channels | 1 | 1 | 1 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 2.7 | 2.7 | 2.7 |
| Architecture | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 2.7 | 2.7 | 2.7 |
| INL(Max), +/-LSB | 0.5 | 0.5 | 0.5 |
| Input Range(Max), V | 5.5 | 5.5 | 5.5 |
| Input Type | Single-Ended | Single-Ended | Single-Ended |
| Integrated Features | Oscillator | Oscillator | Oscillator |
| Interface | Parallel | Parallel | Parallel |
| Multi-Channel Configuration | N/A | N/A | N/A |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | SOIC | SOIC | TSSOP |
| Package Size: mm2:W x L, PKG | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) |
| Power Consumption(Typ), mW | 12 | 12 | 12 |
| Rating | Catalog | Catalog | Catalog |
| Reference Mode | Ext | Ext | Ext |
| Resolution, Bits | 8 | 8 | 8 |
| SINAD, dB | 49 | 49 | 49 |
| SNR, dB | 49 | 49 | 49 |
| Sample Rate (max), SPS | 1.25MSPS | 1.25MSPS | 1.25MSPS |
| Sample Rate(Max), MSPS | 1.25 | 1.25 | 1.25 |
| THD(Typ), dB | -64 | -64 | -64 |
Eco Plan
| TLV571IDW | TLV571IDWG4 | TLV571IPW | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: TLV571 (3)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)
