Datasheet Texas Instruments TMS320C6746

Manufacturer	Texas Instruments
Series	TMS320C6746

Datasheets

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Status

Packaging

Parametrics

Parameters / Models	TMS320C6746BZCE3	TMS320C6746BZCEA3	TMS320C6746BZCED4	TMS320C6746BZWT3	TMS320C6746BZWT4	TMS320C6746BZWTA3	TMS320C6746BZWTD4	TMS320C6746EZCE3	TMS320C6746EZCEA3	TMS320C6746EZCED4	TMS320C6746EZWT3	TMS320C6746EZWT4	TMS320C6746EZWTA3	TMS320C6746EZWTD4	TMX320C6746ZCE	TMX320C6746ZWT
Applications	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom	Communications and Telecom
Approx. Price (US$)					9.00 | 1ku										9.00 | 1ku	9.00 | 1ku
DRAM	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR,DDR2	LPDDR DDR2	LPDDR DDR2
DSP	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x	1 C674x
DSP MHz, Max.	375,456	375,456	375,456	375,456		375,456	375,456	375,456	375,456	375,456	375,456	375,456	375,456	375,456
DSP MHz (Max.)					375 456										375 456	375 456
Display Options	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1
EMAC	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100	10/100
I2C	2	2	2	2	2	2	2	2	2	2	2	2	2	2	2	2
On-Chip L2 Cache	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB	256 KB
Operating Systems	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS	SYS/BIOS
Operating Temperature Range, C	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90		-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90	-40 to 105,-40 to 90,0 to 90
Operating Temperature Range(C)					-40 to 105 -40 to 90 0 to 90										-40 to 105 -40 to 90 0 to 90	-40 to 105 -40 to 90 0 to 90
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
SATA					2										2	2
SPI	2	2	2	2	2	2	2	2	2	2	2	2	2	2	2	2
UART, SCI	3	3	3	3		3	3	3	3	3	3	3	3	3
UART(SCI)					3										3	3
USB	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1	1

Eco Plan

Application Notes

• Download
  TMS320C6748/46/42 Complementary Products
  PDF, 26 Kb, File published: Jul 20, 2009
  This article has been contributed to the TI DaVinciв„ў and OMAPв„ў Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://tiexpressdsp.com/index.php/C6748/46/42_Complementary_Products .This Wiki article serves as a repository of complimentary devices tha
• Download
  Using the TMS320C6748/C6746/C6742 Bootloader (Rev. F)
  PDF, 1.6 Mb, Revision: F, File published: Jan 23, 2014
  This application report describes various boot mechanisms supported by the C6748/C6746/C6742 bootloader read-only memory (ROM) image. Topics covered include the Application Image Script (AIS) boot process, an AISgen tool used to generate boot scripts, protocol for booting the device from an external master device, a UART Boot Host GUI for booting the device from a host PC, and any limitations, def
• Download
  TMS320C6748/46/42 Power Consumption Summary
  PDF, 19 Kb, File published: Aug 30, 2010
  This article discusses the power consumption of the Texas Instruments C6748/46/42. Power consumption on the C6748/46/42 devices are highly application-dependent. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.The power data presented in this document are based on mea
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  Powering the TMS320C6742, TMS320C6746, and TMS320C6748 With the TPS650061
  PDF, 312 Kb, File published: Dec 19, 2011
  This document details the design considerations of a power solution for the TMS320C742,TMS320C6746, and TMS320C6748 (TMS320C6742/C6746/C6748) low-power application processor witha TPS650061, three-rail power management unit (PMU) or power management integrated circuit (PMIC).Portable application solution size demands a high level of integration and the TMS320C6742/C6746/C6748 requires at l
• Download
  OMAP-L132/L138, TMS320C6742/6/8 Pin Multiplexing Utility (Rev. B)
  PDF, 37 Kb, Revision: B, File published: Sep 27, 2013
  The OMAP-L1x8 and C6742/6/8 devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. This software allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices support the peripherals that are selected. This software is useful to anyone
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  Medium Integrated Power Solution Using a Dual DC/DC Converter and an LDO (Rev. B)
  PDF, 387 Kb, Revision: B, File published: Aug 29, 2011
  This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 3.3-V input voltage and a high-efficiency dc/dc converter with integrated FETs for a small, simple design.Sequenced power supply architectures are becoming commonplace in high-performan
• Download
  Simple Power Solution Using LDOs (Rev. B)
  PDF, 150 Kb, Revision: B, File published: Aug 29, 2011
  This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746, TMS320C6748, and OMAP-L132/L138. This design, employing sequenced power supplies, describes asystem with an input voltage of 3.3 V, and uses LDOs for a small, simple system.Sequenced power supply architectures are becoming commonplace in high-performance microprocessor and digital signal processor (DSP) syste
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  High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS (Rev. C)
  PDF, 266 Kb, Revision: C, File published: Aug 29, 2011
  This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply architec
• Download
  TMS320C6748/46/42 & OMAP-L1x8 USB Upstream Device Compliance Testing
  PDF, 1.1 Mb, File published: Aug 17, 2009
  This application report describes the TMS320C6748/46/42 and OMAP-L1x8 electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The on-the-go (OTG) controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
• Download
  High-Integration, High-Efficiency Power Solution Using DC/DC Converters w/DVFS (Rev. A)
  PDF, 208 Kb, Revision: A, File published: May 5, 2010
  This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
• Download
  TMS320C6748/46/42 & OMAP-L132/L138 USB Downstream Host Compliance Testing
  PDF, 3.6 Mb, File published: Aug 17, 2009
  This application report describes the TMS320C6748/46/42 and OMAP-L1x8 embedded Host electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The OTG controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
• Download
  High-Efficiency Power Solution Using DC/DC Converters With DVFS (Rev. A)
  PDF, 161 Kb, Revision: A, File published: May 5, 2010
  This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
• Download
  TI DSP Benchmarking
  PDF, 62 Kb, File published: Jan 13, 2016
  This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
• Download
  TMS320C674x/OMAP-L1x USB Compliance Checklist
  PDF, 89 Kb, File published: Mar 12, 2009
  This application report contains the USB checklist for the TMS320C674x/OMAP-L1x (C674x/OMAP-L1x). The C674x/OMAP-L1x has a compliant full-speed USB device port and does not support a low-speed USB device operation.
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  OMAP-L1x/C674x/AM1x SOC Architecture and Throughput Overview
  PDF, 19 Kb, File published: Feb 12, 2010
  This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://wiki.davincidsp.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview. This collection of Wiki articles provide i
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  High-Speed Interface Layout Guidelines (Rev. G)
  PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
  As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
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  Introduction to TMS320C6000 DSP Optimization
  PDF, 535 Kb, File published: Oct 6, 2011
  The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then

Model Line

Manufacturer's Classification

• Semiconductors> Processors> Digital Signal Processors> C6000 DSP> C674x DSP