Datasheet Texas Instruments TMS320DM8167
| Manufacturer | Texas Instruments |
| Series | TMS320DM8167 |
DaVinci Digital Media Processor
Datasheets
TMS320DM816x DaVinci Digital Media Processors datasheet
PDF, 2.6 Mb, Revision: F, File published: Mar 17, 2015
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Prices
Status
| TMS320DM8167SCYG | TMS320DM8167SCYG2 | TMS320DM8167SCYG4 | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | Yes | Yes |
Packaging
| TMS320DM8167SCYG | TMS320DM8167SCYG2 | TMS320DM8167SCYG4 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 1031 | 1031 | 1031 |
| Package Type | CYG | CYG | CYG |
| Industry STD Term | FCBGA | FCBGA | FCBGA |
| JEDEC Code | S-PBGA-N | S-PBGA-N | S-PBGA-N |
| Package QTY | 44 | 44 | 44 |
| Device Marking | DM8167SCYG | DM8167SCYG | 4 |
| Width (mm) | 25 | 25 | 25 |
| Length (mm) | 25 | 25 | 25 |
| Thickness (mm) | 2.81 | 2.81 | 2.81 |
| Pitch (mm) | .65 | .65 | .65 |
| Max Height (mm) | 3.31 | 3.31 | 3.31 |
| Mechanical Data | Download | Download | Download |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
Parametrics
| Parameters / Models | TMS320DM8167SCYG | TMS320DM8167SCYG2 | TMS320DM8167SCYG4 |
|---|---|---|---|
| ARM CPU | 1 ARM Cortex-A8 | 1 ARM Cortex-A8 | 1 ARM Cortex-A8 |
| ARM MHz, Max. | 1200 | 1200 | 1200 |
| Applications | Video Security | Video Security | Video Security |
| DRAM | DDR2,DDR3 | DDR2,DDR3 | DDR2,DDR3 |
| DSP | 1 C674x | 1 C674x | 1 C674x |
| DSP MHz, Max. | 1000 | 1000 | 1000 |
| EMAC | 2x 10/100/1000 | 2x 10/100/1000 | 2x 10/100/1000 |
| I2C | 2 | 2 | 2 |
| On-Chip L2 Cache | 256 KB (ARM Cortex-A8),256 KB (DSP) | 256 KB (ARM Cortex-A8),256 KB (DSP) | 256 KB (ARM Cortex-A8),256 KB (DSP) |
| Operating Systems | Linux,Android,DSP/BIOS | Linux,Android,DSP/BIOS | Linux,Android,DSP/BIOS |
| Operating Temperature Range, C | 0 to 95 | 0 to 95 | 0 to 95 |
| PCI/PCIe | 2 PCIe Gen2 | 2 PCIe Gen2 | 2 PCIe Gen2 |
| Pin/Package | 1031FCBGA | 1031FCBGA | 1031FCBGA |
| Rating | Catalog | Catalog | Catalog |
| SPI | 1 | 1 | 1 |
| UART, SCI | 3 | 3 | 3 |
| USB | 2 | 2 | 2 |
| Video Acceleration | 3 HDVICPs | 3 HDVICPs | 3 HDVICPs |
| Video Port, Configurable | 1 HDMI TX,2 Input,2 Output,3 HD DACs,4 SD DACs | 1 HDMI TX,2 Input,2 Output,3 HD DACs,4 SD DACs | 1 HDMI TX,2 Input,2 Output,3 HD DACs,4 SD DACs |
| Video Resolution/Frame Rate | 1080p,60 FPS or less | 1080p,60 FPS or less | 1080p,60 FPS or less |
Eco Plan
| TMS320DM8167SCYG | TMS320DM8167SCYG2 | TMS320DM8167SCYG4 | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- DM816x, C6A816x, and AM389x OverviewPDF, 29 Kb, File published: Jul 7, 2011
This article provides an overview of the DM816x, C6A816x, and AM389x product families and has been contributed to the TI Embedded Processors Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_OverviewAll t - TMS320DM816x/C6A816x/AM389x DDR3 Initialization With Software LevelingPDF, 21 Kb, File published: Mar 1, 2011
This article has been contributed to the TI Embedded Processors Wiki. The article describes how to initialize the DDR3 on the TMS320DM816x DaVinciв„ў digital media processors, TMS320C6A816x Integraв„ў DSP+ ARMВ® processors, and AM389x Sitaraв„ў ARMВ® microprocessors (MPUs) PG1.1 samples using the software leveling process.To see the most recently updated version or to cont - PCIe to USB on the TMS320DM816x/TMS320C6A816x/AM389x Evaluation BoardPDF, 22 Kb, File published: Mar 1, 2011
This article has been contributed to the TI Embedded Processors Wiki. The article describes using the PCI ExpressВ® ( PCIeВ®) to the USB host controller card on the TMS320DM816x DaVinciв„ў digital media processors, TMS320C6A816x Integraв„ў DSP+ ARMВ® processors, and AM389x Sitaraв„ў ARMВ® microprocessors (MPUs) family of devices running Linux kernel from a PSP package. This - TMS320DM816x/TMS320C6A816x/AM389x Power Estimation SpreadsheetPDF, 30 Kb, File published: May 18, 2011
This article has been contributed to the TI Embedded Processors Wiki. It describes how to model power consumption for a user's application and to present some measured power scenarios for the TMS320DM816x DaVinciв„ў digital media processors, TMS320C6A816x C6-Integraв„ў DSP+ARM processors, and AM389x Sitaraв„ў ARMВ® microprocessors (MPUs) PG1.0 samples using a provided power estimati - DM816xx Easy CYG Package PCB Escape Routing (Rev. A)PDF, 675 Kb, Revision: A, File published: Mar 19, 2015
The DM816x CYG package is designed with a new technology called a Via Channelв„ў array. This technology allows for easy routing of the device in two signal and two power layers using large throughhole via diameters and standard trace widths; it is cost and time effective. Where more than four printed circuit board (PCB) layers are used, the routing is much more open and flexible than a regular - High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution. - Introduction to TMS320C6000 DSP OptimizationPDF, 535 Kb, File published: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then
Model Line
Series: TMS320DM8167 (3)
Manufacturer's Classification
- Semiconductors> Processors> Digital Signal Processors> Media Processors > DaVinci Video Processors
