Datasheet Analog Devices AD5317RBRUZ

FEATURES FUNCTIONAL BLOCK DIAGRAM
VDD GND VREF AD5317R
VLOGIC 2.5V
REFERENCE
INPUT
REGISTER DAC
REGISTER STRING
DAC A SCLK VOUTA
BUFFER INTERFACE LOGIC Low drift 2.5 V reference: 2 ppm/В°C typical
Tiny package: 3 mm Г— 3 mm, 16-lead LFCSP
Total unadjusted error (TUE): В±0.1% of FSR maximum
Offset error: В±1.5 mV maximum
Gain error: В±0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin)
1.8 V logic compatibility
50 MHz SPI with readback or daisy chain
Low glitch: 0.5 nV-sec
Low power: 3.3 mW at 3 V
2.7 V to 5.5 V power supply
-40В°C to +105В°C temperature range SYNC SDIN SDO INPUT
REGISTER DAC …