Datasheet Linear Technology LTC1544

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  A 10MB/s Multiple-Protocol Chip Set Supports Net1 and Net2 Standards &mdash LT Journal
  PDF, 312 Kb, File published: Feb 1, 1998
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  DESIGN FEATURES A 10MB/s Multiple-Protocol Chip Set
  Supports Net1 and Net2 Standards
  by David Soo
  Introduction Typical Application With the increase in multinational
  computer networks comes the need
  for the network equipment to support
  different serial protocols. One solution is to provide a different serial
  interface board for each market. This
  can become unmanageable as product volume increases. The issues of
  board swapping and inventory are
  often discounted. Another solution is
  to place all of the serial interfaces,
  each isolated, on a single board. For
  example, when the product is sold
  with V.35, the serial cable is mapped
  to that section of the board. This
  requires a large connector plus signal
  routing and board space.
  The best solution is to support many
  different serial protocols on one connector, but that requires the circuitry
  for each serial protocol to share the
  same connector pins. At first glance
  this may not appear to be difficult. …

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  LTC1546 Multiprotocol Chip Simplifies NET1-, NET2- and TBR2-Compliant NET1-, NET2- and TBR2-Compliant &mdash LT Journal
  PDF, 174 Kb, File published: Feb 1, 2000
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  DESIGN INFORMATION LTC1546 Multiprotocol Chip Simplifies
  NET1-, NET2-and TBR2-Compliant
  Serial Interfaces
  by Dan Eddleman
  ports the V.28 (RS232), V.35, V.36,
  X.21, RS449, EIA530 and EIA530-A
  protocols, including all of the necessary cable termination. With these
  two chips, the physical layer of a
  NET1-, NET2-and TBR2-compliant C3
  1ВµF VCC
  5V C1
  1ВµF 3 28 1 27
  26 CHARGE
  PUMP 2
  4 25 C5
  1ВµF LTC1546
  5 DTE_TXD/DCE_RXD D1 6 DTE_SCTE/DCE_RXC T D2 T C2
  1ВµF + The LTC1546 multiprotocol transceiver simplifies network interface
  design and frees up valuable PC board
  real estate. Operating from a single
  5V supply, the LTC1546 and LTC1544
  form a complete, software-selectable
  DTE or DCE interface port that sup-C4 …

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  Net1 and Net2 Serial Interface Chip Set Supports Test Mode &mdash LT Journal
  PDF, 246 Kb, File published: Nov 1, 1998
  Extract from the document

  DESIGN INFORMATION
  Trace A is the time-corrected input
  pulse and trace B the residue amplifier output. The light compensation
  permits very fast slewing but excessive
  ringing amplitude over a protracted
  time results. The ringing is so severe
  that it feeds through during a portion
  of the sample gate off-period, although
  no overdrive results. When sampling
  is initiated (just prior to the sixth
  vertical division) the ringing is seen to
  be in its final stages, although still offensive. Total settling time is about
  2.8Вµ s. Figure 9 presents the opposite
  extreme. Here, a large value compensation capacitor eliminates all ringing
  but slows down the amplifier so much
  that settling stretches out to 3.3Вµs.
  The best case appears in Figure 10.
  This photo was taken with the compensation capacitor carefully chosen
  for the best possible settling time.
  Damping is tightly controlled and settling time goes down to 1.7Вµ s. A = 5V/DIV Settling Times
  of Various Amplifiers
  The previous results, using the
  LT1468 amplifier, provide extremely …

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• Interface > Multiprotocol Transceivers