Datasheet Microchip TN2540

ManufacturerMicrochip
SeriesTN2540

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process

Datasheets

TN2540 Datasheet - N-Channel Enhancement-Mode Vertical DMOS FET
PDF, 727 Kb, Revision: 06-27-2014
Extract from the document

Prices

Status

TN2540N3-GTN2540N3-G-P002TN2540N8-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

TN2540N3-GTN2540N3-G-P002TN2540N8-G
N123
PackageTO-92TO-92SOT-89
Pins333

Parametrics

Parameters / ModelsTN2540N3-GTN2540N3-G-P002TN2540N8-G
BVdss min, V400400400
CISSmax, pF125125125
Operating Temperature Range, °C-55 to +150-55 to +150-55 to +150
Rds, on) max121212
Vgs(th) max, V2.02.02.0

Eco Plan

TN2540N3-GTN2540N3-G-P002TN2540N8-G
RoHSCompliantCompliantCompliant

Model Line