Datasheet Microchip TN5335

ManufacturerMicrochip
SeriesTN5335

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process

Datasheets

TN5335 Datasheet - N-Channel Enhancement-Mode Vertical DMOS FET
PDF, 669 Kb, Revision: 06-27-2014
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Prices

Status

TN5335K1-GTN5335N8-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

TN5335K1-GTN5335N8-G
N12
PackageSOT-23SOT-89
Pins33

Parametrics

Parameters / ModelsTN5335K1-GTN5335N8-G
BVdss min, V350350
CISSmax, pF110110
Operating Temperature Range, °C-55 to +150-55 to +150
Rds, on) max1515
Vgs(th) max, V2.02.0

Eco Plan

TN5335K1-GTN5335N8-G
RoHSCompliantCompliant

Model Line

Series: TN5335 (2)