Datasheet Microchip LP0701
Manufacturer | Microchip |
Series | LP0701 |
These enhancement-mode (normally-off) transistors utilize a lateral MOS structure and well-proven silicon-gate manufacturing process
Datasheets
LP0701 Datasheet - P-Channel Enhancement-Mode Lateral MOSFET
PDF, 763 Kb, Revision: 06-27-2014
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Status
LP0701LG-G | LP0701N3-G | |
---|---|---|
Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
LP0701LG-G | LP0701N3-G | |
---|---|---|
N | 1 | 2 |
Package | SOIC | TO-92 |
Pins | 8 | 3 |
Parametrics
Parameters / Models | LP0701LG-G | LP0701N3-G |
---|---|---|
BVdss min, V | -16.5 | -16.5 |
CISSmax, pF | 250 | 250 |
Operating Temperature Range, °C | -55 to +150 | -55 to +150 |
Rds, on) max | 1.5 | 1.5 |
Vgs(th) max, V | -1.0 | -1.0 |
Eco Plan
LP0701LG-G | LP0701N3-G | |
---|---|---|
RoHS | Compliant | Compliant |
Model Line
Series: LP0701 (2)