Datasheet Microchip TP2424

ManufacturerMicrochip
SeriesTP2424

This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven silicon-gate manufacturing process

Datasheets

TP2424 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 552 Kb, Revision: 06-27-2014
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Prices

Status

TP2424N8-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)

Packaging

TP2424N8-G
N1
PackageSOT-89
Pins3

Parametrics

Parameters / ModelsTP2424N8-G
BVdss min, V-240
CISSmax, pF200
Operating Temperature Range, °C-55 to +150
Rds, on) max8
Vgs(th) max, V-2.4

Eco Plan

TP2424N8-G
RoHSCompliant

Model Line

Series: TP2424 (1)