Datasheet Microchip TP2540

ManufacturerMicrochip
SeriesTP2540

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process

Datasheets

TP2540 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 713 Kb, Revision: 06-27-2014
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Prices

Status

TP2540N3-GTP2540N3-G-P002TP2540N8-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

TP2540N3-GTP2540N3-G-P002TP2540N8-G
N123
PackageTO-92TO-92SOT-89
Pins333

Parametrics

Parameters / ModelsTP2540N3-GTP2540N3-G-P002TP2540N8-G
BVdss min, V-400-400-400
CISSmax, pF125125125
Operating Temperature Range, °C-55 to +150-55 to +150-55 to +150
Rds, on) max252525
Vgs(th) max, V-2.4-2.4-2.4

Eco Plan

TP2540N3-GTP2540N3-G-P002TP2540N8-G
RoHSCompliantCompliantCompliant

Model Line