Datasheet Intersil KAD5510P-12Q48

DATASHEET
KAD5510P FN7693
Rev 3.00
February 8, 2016 Low Power 10-Bit, 250/210/170/125MSPS ADC
The KAD5510P is a family of low power, high performance
10-bit analog-to-digital converters. Designed with Intersil’s
proprietary FemtoChargeв„ў technology on a standard CMOS
process, the family supports sampling rates of up to
250MSPS. The KAD5510P is part of a pin-compatible portfolio
of 10-, 12-and 14-bit A/Ds with sample rates ranging from
125MSPS to 500MSPS. Features A Serial Peripheral Interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset. Selectable clock divider: п‚ё1, п‚ё2 or п‚ё4 Digital output data is presented in selectable LVDS or CMOS
formats. The KAD5510P is available in a 48 Ld QFN package
with an exposed paddle. Operating from a 1.8V supply,
performance is specified across the industrial operating
temperature range (-40°C to +85°C). Two’s complement, gray code or binary data format Key Specifications Pb-free (RoHS compliant) 1.5GHz analog input bandwidth 60fs clock jitter Programmable gain, offset and skew control Over-range indicator Clock phase selection Nap and sleep modes DDR LVDS-compatible or LVCMOS outputs Programmable built-in test patterns Single-supply 1.8V operation SNR = 60.7dBFS for fIN = 105MHz (-1dBFS) Applications SFDR = 86.1dBc for fIN = 105MHz (-1dBFS) Power amplifier linearization Total Power Consumption
-234/189mW at 250/125MSPS (DDR Mode) Radar and satellite antenna array processing Related Literature High-performance data acquisition Broadband communications KAD5510P-50 datasheet, “10-Bit, 500MSPS A/D Converter” Communications test equipment CLKP OVDD AVDD CLKDIV WiMAX and microwave receivers CLKOUTP CLOCK
GENERATION CLKN 0 CLKOUTN -20 VINP 10-BIT
250 MSPS
ADC SHA
VINN
VCM 1.25V + …